微波存取全球互通頻段變壓器耦合式功率放大器與電壓控制振盪器暨除頻器之研製

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：61

、訪客IP：52.15.128.160

姓名

呂紹良(Shao Liang Lu) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

微波存取全球互通頻段變壓器耦合式功率放大器與電壓控制振盪器暨除頻器之研製
(The Implementation of WiMAX Transformer Coupling Power Amplifiers, Voltage Controlled Oscillators and Frequency Divider)

相關論文

★ 應用於筆記型電腦數位電視單極天線之研製	★ 應用於數位機上盒與纜線數據機之電纜多媒體傳輸標準多工濾波器
★ 印刷共面波導饋入式多頻帶與超寬頻天線設計	★ 微波存取全球互通頻段前向匯入式功率放大器與高效率Class F類功率放大器暨壓控振盪器電路之研製
★ 應用於矽基功率放大器與混頻器之傳輸線型變壓器研究	★ 應用於V-頻段射頻收發機前端電路之低功耗源極注入式混頻器之研製
★ 應用積體電路上方後製程與整合被動元件於互補式金氧半導體製程之系統封裝研究	★ 應用fT-倍頻電路架構於毫米波壓控振盪器與注入鎖定除頻器之研製
★ 應用傳輸線型變壓器於X/K–Ka/V頻段全積體整合之寬頻互補式金氧半導體功率放大器研製	★ 應用於K / V 頻段低功耗混頻器之研製
★ 應用於K/V頻段之低功耗CMOS低雜訊放大器之研究	★ 應用於5-GHz CMOS射頻前端電路之低電壓自偏壓式混頻器與高線性化功率放大器之研製
★ 應用於 K 頻段射頻接收機之寬頻低功耗 CMOS 低雜訊放大器之研製	★ 應用磁耦合變壓器於K頻段之低功耗互補式金氧半導體壓控振盪器研製
★ 應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製	★ 應用於C/X頻段全積體整合之互補式金氧半導體寬頻低功耗降頻器與寬頻功率混頻器之研製

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文描述數個應用於微波存取全球互通系統之射頻電路設計，分別以TSMC 0.18 μm CMOS製程與TSMC 0.35 μm SiGe BiCMOS製程來實現，所實現電路包括一個電容補償諧波控制技術之功率放大器、兩個採用變壓器耦合之功率放大器、轉導提升式考畢茲電壓振盪器、變壓器回授式電壓控制振盪器、互補交錯耦合式壓控振盪器與除頻器。功率放大器與電壓控制振盪器均是採用二階式發射機的系統架構，應用在2.6 GHz頻段為了行動式微波存取全球互通系統需求。
各電路之量測特性如下：採用電容補償諧波控制技術之功率放大器，約有13.2 dB的增益、約9.04 dB輸入回返損耗、約5.4 dB的輸出回返損耗、20.2 dBm的輸出1 dB增益壓縮點、28.2 dBm的輸出三階截斷點、1 dB增益壓縮點的功率增進效率為24.4 %；採用變壓器耦合之功率放大器架構一，約有8.2 dB的增益、約8.63 dB的輸入回返損耗、約7.56 dB的輸出回返損耗、23.3 dBm的輸出1 dB增益壓縮點、27.5 dBm的輸出三階截斷點、1 dB增益壓縮點的功率增進效率為17.04 %；採用變壓器耦合之功率放大器架構二，約有18.35 dB的增益、大於10 dB的輸入回返損耗、約3.97 dB的輸出回返損耗、24.2 dBm的輸出1 dB增益壓縮點、27.8 dBm的輸出三階截斷點、1 dB增益壓縮點的功率增進效率為15.9 %。轉導提升之考畢茲壓控振盪器，利用差動電路特性，達成轉導提升的效果，改善了以往考畢茲振盪器難起振的條件，達到低功率的效能。頻率可調範圍為360 MHz，輸出功率為0.92 ~ 2.11 dBm，離主頻100 KHz之相位雜訊為-90.9 dBc/Hz，離主頻1 MHz之相位雜訊為-118.2 dBc/Hz，功率消耗為3.156 mW，優化指數為-187.8 dBc/Hz 。變壓器回授壓控振盪器，頻率可調範圍為320 MHz，輸出功率為-1.82~0.73 dBm，離主頻100 KHz之相位雜訊為-94.2 dBc/Hz，離主頻1 MHz之相位雜訊為-120.1 dBc/Hz，功率消耗為3.22 mW，優化指數為-182.97 dBc/Hz。互補交錯耦合式壓控振盪器與除頻器，頻率可調範圍為360 MHz，輸出功率為 -3.9 ~ -2.8 dBm，離主頻100 KHz之相位雜訊為-92.6 dBc/Hz，離主頻1 MHz之相位雜訊為-117.4 dBc/Hz，功率消耗為7.2 mW，優化指數為-183.3 dBc/Hz，除頻器可操作的除頻範圍為0.37 ~ 3.07 GHz。

摘要(英)

This thesis describes several radio frequency circuit designs for WiMAX applications. They are implemented in TSMC 0.35 ?m SiGe BiCMOS and 0.18 ?m CMOS technologies, respectively. The implemented circuits include one power amplifier (PA) using the capacitance compensation and harmonic control technique, two PAs using transformer coupling technique, three voltage controlled oscillators (VCOs) using gm-boosting, transformer feedback, complemently cross couple techniques and one frequency divider. These PAs and VCOs operating at 2.6 GHz are realized for the two-step transmitter architecture in mobile WiMAX system.
The measured results are summaried as below：PA with capacitance compensation and harmonic control technique one, achieves a power gain of 13.2 dB with input return loss 9.04 dB, output return loss of 5.4 dB, 1-dB gain compression point (P1dB) of 20.2 dBm, the output third-order intercept point (OIP3) of 28.2dBm, power added efficiency (PAE) at P1dB of 24.4 %. PA with transformer coupling technique one achieves a power gain of 8.2 dB with input return loss of 8.63 dB, output return loss of 7.56 dB, P1dB of 23.3 dBm, the output third-order intercept point (OIP3) of 27.5dBm, PAE at P1dB of 17.04 %. PA with transformer coupling technique two achieves a power gain of 18.35 dB with input return loss better than 10 dB, output return loss of 3.97 dB, P1dB of 24.2 dBm, the output third-order intercept point of 27.8dBm, PAE at P1dB of 15.9 %. Differential Colpitts VCO with Gm-boosting reduces the power consumption which yields a tuning range of 360 MHz, an output power of 0.92 ~ 2.11 dBm. The phase noise at 100 KHz and 1 MHz offset frequencies achieves -90.9 dBc/Hz and -118.2 dBc/Hz, respectively. The power consumption of the VCO core dissipates only 3.156 mW and FOM is -187.8 dBc/Hz.Transformer feedback VCO yields a tuning range of 320 MHz, an output power of -1.82~0.73 dBm. The phase noise at 100 KHz and 1 MHz offset frequencies is -94.2 dBc/Hz and -120.1 dBc/Hz, respectively. The power consumption of the VCO core dissipates only 3.22 mW with FOM of -182.97 dBc/Hz. Complemently cross-coupled VCO and frequency divider yields a tuning range of 360 MHz, an output power of -3.9 ~ -2.8 dBm. The phase noise at 100 KHz and 1 MHz offset frequencies is -92.6 dBc/Hz and -117.4 dBc/Hz, respectively. The power consumption of the VCO core dissipates only 7.2 mW with FOM of -183.3 dBc/Hz. The total loacking range of frequency divider is from 0.37 ~ 3.7 GHz.

關鍵字(中)

★ 功率放大器
★ 電壓控制振盪器
★ 除頻器

關鍵字(英)

★ Power Amplifiers
★ Voltage Controlled Oscillators
★ Frequency Divider

論文目次

目錄
中文摘要
英文摘要
致謝
目錄
圖目錄
表目錄
第一章緒論
1-1 微波存取全球互通系統介紹
1-2 研究動機
1-3 章節簡述
第二章功率放大器
2-1 功率放大器導論
2-2 功率放大器之重要參數
2-3 功率增益的分類
2-3.1轉移功率增益
2-3.2可用功率增益
2-3.3工作功率增益
2-3.4最大轉移功率增益
2-3.5最大穩定增益
2-3.6注入增益
2-3.7單向增益
2-4 功率放大器的分類
2-4.1線性型功率放大器
2-4.2開關型功率放大器
2-5 功率放大器線性化方式
2-5.1 前置失真
2-5.2 負回授
2-5.3 順向饋入式
2-5.4 LINC
2-5.5 CALLUM
2-5.6 封包消除重建
2-6 功率放大器非線性現象分析
2-6.1 Power Series理論分析
2-6.2 Power Series的應用
2-6.3 Volterra Series理論分析
2-6.4 非線性電流分析
2-6.5 非線性轉導分析
2-6.6 非線性轉導之萃取
2-7 文獻回顧
2-8 採用電容補償及諧波控制技術之功率放大器之研製
2-8.1 電路架構與設計原理
2-8.2 量測結果與討論
2-9 採用變壓器耦合技術之高功率輸出積體化功率放大器之研製
2-9.1 變壓器原理與設計概念簡介
2-9.2 電路架構ㄧ設計原理
2-9.3 量測結果與討論
2-9.4 電路架構二設計原理
2-9.5 量測結果與討論
第三章電壓控振盪器
3-1 電壓控振盪器導論
3-2 電壓控振盪器之重要參數
3-3 相位雜訊導論
3-4 Lesson 相位雜訊模型
3-5 線性非時變理論
3-6 應用於 802.11a WLAN 轉導提升式壓控振盪器之研製
3-6.1 考畢茲壓控振盪器之原理分析
3-6.2 轉導值提升原理分析
3-6.3 設計流程
3-6.4 考畢茲壓控振盪器量測結果
3-6.5 量測結果討論理
3-7 應用於WiMax系統之變壓器回授式壓控振盪器
3-7.1 雙變壓器回授振盪器設計原理
3-7.2 變壓器回授式技巧介紹
3-7.3 變壓器回授壓控振盪器量測結果
3-7.4 量測結果討論
3-8 UNII頻段交錯耦合式壓控振盪器與WiMax頻段除頻器之研製
3-8.1 UNII頻段交錯耦合式壓控振盪器介紹
3-8.2 WiMax頻段除頻器介紹
3-8.3 UNII頻段交錯耦合壓控振盪器與WiMax頻段除頻器量測結果
3-8.4 量測結果討論
第四章結論
4-1 結論
4-2 未來期許與研究方向
參考文獻

參考文獻

[1] B. Bisla, R. Eline, and L. M. Franca-Neto, “RF system and circuit challenges for WiMax,” Intel Technology Journal, Vol. 8, No. 3, pp. 189-199, Aug. 2004.
[2] A. Ghosh, D.R. Wolter, J.G. Andrews, and R. Chen, “Broadband wireless access with WiMax/802.16: current performance benchmarks and future potential,” IEEE Communications Magazine, Vol. 43, No. 2, pp. 129-136, Feb. 2005.
[3] S. M. Cherry, “WiMax and Wi-Fi separate and unequal,” IEEE Spectrum, vol. 41, No. 3, pp. 16-16, Mar. 2004.
[4] “Part 16: Air interface for fixed broadband wireless access systems,” IEEE standard for local and metropolitan area networks, IEEE Std™ 802.16, 2004.
[5] D. Y. C. Lie, P. Lee, J. D. Popp, J. F. Rowland, H. H. Ng and A. H. Yang, “The limitations in applying analytic design equations for optimal Class E rf power amplifier design”, Department of Electrical and Computer Engineering, University of California, San Diego, La Jolla, CA,pp. 161-164,April 2005.
[6] C. C. Chu, “Design and implementation of high-efficiency 2.4 GHz Class-E power amplifier mmics and modules”, Master Thesis, Department of Electrical Engineering, National Sun Yat-Sen University, July 2003.
[7] F. H. Raab, “Class-E, class-C, and class-F power amplifiers based upon a finite number of harmonics,” IEEE Trans. Microwave Theory Technique., Vol. 47, No. 8, pp.1462-1468, Aug. 2001.
[8] S. D. Kee, I. Aoki, A. Hajimiri, and D. B. Rutledge, “The class-E/F family of ZVS switching amplifiers,” IEEE Transactions on Microwave Theory and Techniques, Vol. 51 ,No.6, pp. 1677-1690,June 2003.
[9] F. H. Raab, P.Asbeck, S. Cripps,P.B.Kenington, Z. B. Popovic, N. Pothecary, J. F. Sevic, and N. O. Sokal, “Power Amplifiers and Transmitters for RF and Microwave, ” IEEE Transactions on Microwave Theory and Techniques, Vol. 50, No. 3,pp.814-826, Mar. 2002.
[10] P. B. Kenington, High – linearity rf amplifier design, Artech House, 2000.
[11] P. B. Kenington, “Achieving high-efficiency in multi-carrier basestation power amplifier,” Microwave Engineering Europe, pp. 83~90, September 1999.
[12] D. C. Cox, “Linear amplification by sampling techniques: a new application for deltacoders”, IEEE Transactionson Communication, Vol.23, No.8, pp. 793-798, Aug. 1975.
[13] V.Petrovic, W.Gosling, “Polar-LoopTransmitter”, ElectronicsLetters, Vol. 15, No.10, May 1979.
[14] E. Eid, F.M.Ghannouchi, “Adaptive nulling loop control for 1.7 GHz feed-forward linearization systems”, IEEE Transaction on Microwave Theory and Technique, Vol. 45, No.1 , pp. 83-86, Jan. 1997.
[15] D.C.Cox, “Linear amplification with nonlinear components”, IEEE Transaction on Communication, Vol. 22, No.12 , pp. 1942-1945, Dec. 1974.
[16] J. L. Dawson, “Power amplifier linearization techniques: an overview”, Workshop on RF Circuit for 2.5 G and 3G Wireless Systems, Feb. 2001.
[17] A. Bateman, “Combined analogue locked loop universal modulator”, Proc. Of the 24tnd IEEE Vehicular Technology Conference, pp. 759-763 May 1992.
[18] L. R. Kahn, “Single sideband transmission by envelopeelimination and restoration,” in Proc. IRE, Vol. 40, No. 7, pp. 803-806, July 1952.
[19] F. H. Raab and D. J. Rupp, “High-efficiency multimode HF/VHF transmitter for communication and jamming,” Proc. IEEE Conf. Rec.(MILCOM’94), Vol. 3, pp. 880–884,1994.
[20] G. A. Rincon-Mora, “System-level requirements of dc–dcconverters for dynamic power supplies of power amplifiers,” Proc.IEEE Asia-Pacific Conf. (ASIC’02), pp. 149–152, 2002.
[21] F. H. Raab, “Drive modulation in kahn-technique transmitters,” in IEEE MTT Symp. Dig., Vol. 2, pp. 811–814, June 1999.
[22] “An overview of linear amplifier systems,”Application Notes, Ultra RF.
[23] I. Aoki, S.D. Kee, D.B. Rutledge, and A. Hajimiri, “Fully integrated cmos power amplifier design using the distributed active-transformer architecture,” IEEE J. Solid-State Circuits, Vol. 37, pp. 371–383, Mar. 2002.
[24] O. Lee, K. S. Yang, K. H. An, Y. Kim, H. Kim, J. J. Chang ,Wangmyong Woo, Chang-Ho Lee,and Joy Laska,” A 1.8-GHz 2-watt fully integrated cmos push-pull parallel-combined power amplifier design”, IEEE Radio Frequency Integrated Circuits Symposium,Vol. 35, pp.435-438,June 2007.
[25] P. Haldi, D. Chowdhury, G. Liu, and A. M. Niknejad, “A 5.8 GHz linear power amplifier in a standard 90nm cmos process using a 1V power supply,” in Proc. IEEE Radio Frequency Integrated Circuits Symposium, pp. 431–434, June 2007.
[26] Jounghyun Yim, Ildu Kim, Daehyun Kang, and Bumman Kim, ” High-efficiency push–pull power amplifier with high operation voltage”, IEEE Microwave and Wireless Components Letters, Vol. 17, pp. 382-384, May 2007.
[27] Jaemin Jang, Changkun Park, Haksun Kim,and Songcheol Hong,”A cmos rf power amplifier using an off-chip transmision line transformer with 62% pae”, IEEE Microwave and Wireless Components Letters, Vol. 17,pp. 385-387, May 2007.
[28] Shouxuan Xie; Paidi, V.; Coffie, R.; Keller, S.; Heikman, S.; Moran, B.; Chini, A.; DenBaars, S.P.; Mishra, U.; Long, S.; Rodwell, M.J.W, ” High-linearity class B power amplifiers in GaN HEMT technology”, IEEE Microwave and Wireless Components Letters,vol. 13, pp. 284-286, July 2003.
[29] Changkun Park, Dong Ho Lee, Jeonghu Han and Songcheol Hong,” Tournament-shaped magnetically coupled power-combiner architecture for rf cmos power amplifier”, IEEE Transactions on Microwave Theory and Techniques ,vol. 55,pp. 2034-2042, Oct. 2007.
[30] Chengzhou Wang, Lawrence E.Larson, and Peter M. Asbeck, “A nonlinear capacitance cancellation technique and its application to a cmos Class AB power amplifier,”IEEE Radio Frequency Integrated Circuits Symposium, pp.39-42, 2001.
[31] Chengzhou Wang, Mani Vaidyanathan, and Lawrence E.Larson, “A capacitance compensation techinque for improved linearity in cmos Class-AB power amplifiers.” IEEE Journal of Soild-State Circuits, Vol. 39, November 2004.
[32] Ichiro Aoki, Scott D.Kee, David B, and Ali Hajimiri, “Distributed active transformer-a new power combining and impedance-transformation technique,” IEEE Microwave Theory and Techniques, Vol. 50, pp.316-331, Jan. 2002.
[33] J. R Long, Member,”Monolithic transformers for silicon rfic design,” IEEE Journal of Soild-State Circuits, Vol. 35, No. 9, September 2000
[34] M. Danesh and J. Long, “Differential driven symmetric microstrip inductors,” IEEE Trans. Microwave Theory and Techniques, Vol. 50, No. 1, Jan. 2002.
[35] D. B. Lesson, ”A simple model of feedback oscillator noise spectrum,” Proc.IEEE, Vol. 54, No. 2, pp. 329-330, Feb. 1966.
[36] L. Dai, R. Harjani, Design of High-Perfoemance CMOS Voltage-Controlled Oscillators, Kluwer Academic Publishers, 2003.
[37] B. Razavi, RF Microelectronics, Prentice Hall, Inc.1998.
[38] Thomas Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, 2004.
[39] F. M. Gardner, “Charge pump phase-locked loop,”IEEE Trans. Comm., Vol. 28, pp.1849-1858, Nov. 1980.
[40] E. J. Baghdady, R. N. Lincoln, and B. D. Nelin, “Short-term frequency stability: characterization, theory, and measurement,” Proc.IEEE, Vol. 53, pp 704 -722, July 1965.
[41] L. S. Culter and C. L. Searle, “Some aspects of the theory and measurement of frequency fluctuations in frequency standards,” Proc.IEEE, Vol. 54, pp.136-154, Feb. 1966.
[42] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. of Solid-State Circuits, Vol. 33, No. 2, pp. 179–194, February 1998.
[43] A. Hajimiri and T. H. Lee, “ Design issues in cmos differential lc oscillators,” IEEE J. of Solid-State Circuits, Vol. 34, No. 5, pp. 717-724, May 1999.
[44] L. Jia, J.-G. Ma, K. S. Yeo, and M. A. Do, “9.3-10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance,” IEEE Trans, Microwave Theroy Tech., Vol. 52, pp. 1273-1278, April 2004.
[45] N.-J. Oh and S.-G. Lee, “11-GHz cmos differential vco with back-gate transformer feedback,” IEEE Microwave Wireless Comp. Lett., Vol. 15, pp.733-735, Nov. 2005.
[46] T. Song, S. Ko, D.-H. Cho, H.-S. Oh, C. Chung, and E. Yoon, “A 5GHz transformer-coupled cmos vco using bias-level shifting technique,” IEEE Symposium on Radio Frequency Integrated Circuits (RFIC), pp.127-130, June 2004.
[47] M.-D. Tsai, Y.-H. Cho, and H. Wang, “A 5-GHz low phase noise differential colpitts cmos vco,” IEEE Microwave Wireless Comp. Lett., Vol. 15, pp.733-735, May 2005.
[48] X. Li; S. Shekhar, and D.J. Allstot, “Gm boosted common-gate lna and differential colpitts VCO/QVCO in 0.18 um CMOS,” IEEE J. of Solid-State Circuits, Vol. 40, pp. 2609-2619, Dec. 2005
[49] S. Lo and S. Hong, “Noise property of a quadrature balanced vco,” IEEE Microwave and Wireless Components Letters, Vol. 15, No. 10, pp.673–675, Oct. 2005.
[50] E. Hegazi, H. Sjoland, and A. A. Abidi, “A filtering technique to lower lc oscillator phase noise,” IEEE J. Solid-State Circuits, Vol. 36, No. 12, pp. 1921- 1930, Dec. 2001.
[51] Zhenbiao Li and O. K. K., ”A low-phase-noise and low-power multiband cmos voltage controlled oscillator,” IEEE J. of Solid-State Circuits, Vol. 40, No. 6, pp. 1296-1302, June 2005.
[52] C. M. Hung, B. Floyd, and K. K. O, “A Fully integrated 5.35-GHz cmos vco and a prescaler,” IEEE Trans. Microwave Theory Tech., Vol. 49, No.1, pp. 17–22, Jan. 2001
[53] T. Y. Kim, A. Adams, and N. Weste, “High performance soi and bulk cmos 5 GHz vco,” IEEE Radio Frequency Integrated Circuits Symp. Dig. Papers, Philadelphia, PA, pp. 93–96, Jun.2003.
[54] N. Fong, J. Plouchart, N. Zamdmer, D. Liu, L. Wagner, C. Plett, and N. Tarr, “Design of wide-band cmos vco for multiband wireless lna applications,” IEEE J. of Solid-State Circuits, Vol. 38, No. 8, pp.1333–1342, Aug. 2003.
[55] B. Min and H. Jeong, “5-GHz cmos lc vcos with wide tuning ranges,” IEEE Microwave and Wireless Component Letter, Vol. 15, No. 5, pp. 336-338, May 2005.
[56] Taeksang Song, Sangsoo Ko, Dae-Hyung Cho, Han-Su Oh, Chulho Chung, and Euisik Yoon, “A 5GHz transformer-coupled cmos vco using bias-level shifting technique,” IEEE Radio Frequency Integrated Circuits Symposium, pp.127-130, June 2004.
[57] Sjoland H. “Improved switched tuning of differential cmos vcos”, Vol. 49, No. 5, May 2002.
[58] Chung-Yu Wu; Chi-Yao Yu “ A 0.8 V 5.9 GHz wide tuning range cmos vco using inversion-mode band switching varactors”,Circuits and Systems, IEEE International Symposium on, Vol. 5, pp. 5079-5082, May 2005
[59] Aparicio,R.;Hajimir ”A noise-shifting differential colpitts vco”, IEEE Journal Solid-State Circuits ,Vol. 37, No. 12, pp. 1728-1736, Dec. 2002.
[60] J. Gil, S.-S. Song, H. Lee, and H. Shin, “A -119.2 dBc/Hz at 1MHz, 1.5 mw, fully integrated 2.5 GHz cmos vco using helical inductors,” IEEE Microwave. Wireless Compon. Lett., Vol. 13, No. 11, pp.457–459, Nov. 2003.
[61] L. Jia, J. G. Ma, K. S. Yeo, X. P. Yu, M. A. Do, and W. M. Lim, A 1.8-V 2.4/5.15-GHz dual-band lc vco in 0.18-?m cmos technology,” IEEE Microwave Wireless Comp. Lett., Vol. 16, pp.194-196, April 2006.
[62] Axel D. Berny, Student Member, IEEE, Ali M. Niknejad, Member, IEEE, and Robert G. Meyer, Fellow, IEEE,”A 1.8-GHz lc vco with 1.3-GHz tuning range and digital amplitude calibration,” IEEE Journal Solid-State Circuits, Vol. 40, No. 4, April 2005.
[63] J.J.Rael and A.A.Abidi, ”Physical processes of phase noise differential LC oscillators,” IEEE Custom Integrated circuits conference, 2000.
[64] Z. Gu and A. Thiede, “18 GHz low-power cmos static frequency divider,” IEEE Custom Integrated Circuits Conference, pp. 596-572 May 2000.
[65] Chien-Chang Huang and Han-Ting Pai, “A recursive scheme for MESFET nonlinear current coefficient,” Microwave Symposium Digst, IEEE MTT-S International, Vol. 1, pp.463-466, June 2003.
[66] C.C Huang, H.T Pai, and K.U Chen,” Analysis of microwave MESFET power amplifiers for digital wireless communications systems,” IEEE Transactions On Microwave Theory And Techniques, Vol. 52, April 2004.
[67] Chien-Chang Huang and Kuan-Yu Chen, ” InGaP/GaAs HBT in characterization for volterra series analysis,” Microwave Symposium Digst, IEEE MTT-S International, Vol. 2, pp.1073-1076, June 2004.
[68] 陳冠宇,“應用於微波存取全球互通之收發機研製”,中央大學,碩士論文, 2006。
[69] 陳冠宇, “HBT非線性現象分析與HBT元件應用在Wireless LAN 802.11a之設計” , 元智大學,碩士論文, 2003。
[70] 李盈達, “微波存取全球互通頻段接收機前端電路暨K頻段低雜訊放大器之研製”, 中央大學,碩士論文, 2007。
[71] 梁可駿, “以脈衝靈敏函數分析壓控振盪器之相位雜訊特性與K頻段差動低雜訊放大器之研製”, 中央大學,碩士論文, 2007。
[72] 陳致宏,“微波存取全球互通頻段前向匯入式功率放大器與高效率Class F類功率放大器暨壓控震盪器電路之研製”, 中央大學,碩士論文, 2007。
[73] 高曜煌, “射頻鎖相迴路IC設計”, 滄海書局, 2005.
[74] 劉深淵, 楊清淵, “鎖相迴路”, 滄海書局, 2006.

指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2008-10-14

推文