多層鍺奈米晶體的製作與其在金氧半浮點電容的應用

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姓名

彭朝文(Chao-Wun Peng) 查詢紙本館藏

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電機工程學系

論文名稱

多層鍺奈米晶體的製作與其在金氧半浮點電容的應用
(Fabrication of Multilayer Ge Nanocrystal and Its Application in Floating-Dot MOS Capacitor)

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摘要(中)

論文摘要
高溫氧化矽鍺合金或退火矽鍺氧合金時，矽會被優先氧化而鍺原子會自氧化物中釋放出來並埋藏在氧化物與矽鍺合金介面，利用此性質應可製作出奈米尺寸的鍺晶粒。在本論文中，利用電漿助長化學氣相沉積系統分別製備非晶矽鍺/非晶氮氧化矽、非晶矽鍺/非晶氮化矽與非晶矽鍺氧/非晶氮化矽多層膜，並分別進行高溫氧化與退火處理，以形成包埋在氧化層內鍺奈米晶粒。實驗結果顯示對非晶矽鍺氧/非晶氮化矽多層膜進行高溫退火處理後，可得到多層、均勻分佈且尺寸大小為約5奈米的鍺奈米晶粒，鍺奈米晶粒的結晶性係藉由拉曼光譜量測的結果而推知的。
我們亦將嵌入鍺奈米晶粒的氧化層製作成金屬-氧化物-半導體電容器結構，探討鍺奈米晶粒的電荷儲存效應。在電流對電壓特性量測時發現電流跳動的現象，可歸因於來自p型矽基片的電洞充電效應。此外，由電容對電壓特性量測時所觀察到磁滯的現象，可推知鍺奈米晶粒的電荷儲存效果，其中所製作的多層鍺奈米晶粒的電荷儲存記憶窗口可達到3伏特。再者，我們也藉由各種不同頻率的電容對電壓量測結果，探討鍺奈米晶粒的電荷儲存現象。

摘要(英)

Abstract
Since the Si will be preferentially oxidized during the high-temperature oxidation of SiGe alloy or annealing of SiGeO alloy and the segregated Ge atom will pile-up along the SiGe/SiO2 interface, it could be expected that the Ge nanocrystals would be tentatively formed with the Ge atom segregation and agglomeration. In this thesis, the multilayer a-SiGe/a-SiON, a-SiGe/a-SiN, and a-SiGeO/a-SiN thin-films have been prepared with a plasma enhanced chemical vapor deposition system, then with a thermal oxidation for a-SiGe/a-SiON and a-SiGe/a-SiN or a thermal annealing for a-SiGeO/a-SiN thin-films, the single /multilayer nano-meter scale Ge crystal dots have been obtained. The multilayer, well-separated, and 5 nm-sized Ge nanocrystals could be obtained with a thermal annealing technique. The crystallinity of Ge nanodots has been checked with a Raman spectroscopy.
The metal-oxide-semiconductor (MOS) capacitors ( MOS-Cs ) with Ge nanocrystals embedded in oxide have been fabricated to investigate the charge trapping effect of Ge nanocrystals. A current spike phenomenon in I-V curve has been observed. This was ascribed to the transient current of hole charging from p-type Si substrate. In addition, the hysteresis phenomenon has also been observed in C-V measurement. This indicated that the charge storage effect resulted from the formed Ge nanocrystals. The highest obtainable memory window with multilayer Ge nanocrystals was 3 V. Furthermore, the charge storage effects have been investigated by using the C-V measurement at various frequencies.

關鍵字(中)

★ 電壓-電流
★ 電壓-電容
★ 量子點
★ 拉曼光譜
★ 金氧半電容
★ 鍺

關鍵字(英)

★ C-V
★ Raman
★ I-V
★ Nanocrystals
★ Ge

論文目次

Contents
Table Captions………………………...…………………………….....IV
Figure Captions………………………………………………………....V
CHAPTER 1 Introduction 1
1.1 General background 1
1.2 Motivation 2
1.3 Organization of Thesis 2
CHAPTER 2 Nanocrystal Formation and MOS-C Operation Principles 3
2.1. Formation of Ge NCs 3
2.1.1 Selective oxidation of SiGe 3
2.1.2 Thermal annealing of SiGeO 4
2.2 Operation principles of MOS-C 4
2.2.1 Structure of MOS-C 4
2.2.2 Energy-band diagram of MOS-C 5
2.2.3 Charge storage with Ge NCs embedded in oxide of MOS-C 8
2.3 Program/Erase mechanism 12
2.3.1 Basic program mechanism 12
2.3.2 Basic erase mechanism 13
CHAPTER 3 Fabrication Processes and Measurement
Techiques 15
3.1 PECVD System 15
3.2 Fabrication of sample A series 15
3.3 Fabrication of sample B series 18
3.4 Fabrication of sample C series 20
3.5 Measurement Techniques 24
3.5.1 Micro-Raman spectroscopy 24
3.5.2 Energy dispersive spectrometer 24
3.5.3 Scanning electron microscope 25
3.5.4 Transmission electron microscope 25
3.5.5 Electrical characteristic measurement 26
CHAPTER 4 Material Characterizations of Thin-Film
Multilayers 27
4.1 Characterizations of sample A series 27
4.2 Characterizations of sample B series 30
4.3 Characterizations of sample C series 33
CHAPTER 5 Electrical Characterizations of Sample C3 39
5.1 I-V characteristics 39
5.2 C-V characteristics 44
5.3 C-V measurements at various frequencies 56
CHAPTER 6 Conclusion 68
REFERENCES 69

參考文獻

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指導教授

洪志旺(Jyh-Wong Hong)

審核日期

2008-7-11

推文