應用於動態電壓調整之高轉換效能電流偵測與輸出漣波電壓控制降壓穩壓器

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姓名

李玗家(Yu-chia Lee) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用於動態電壓調整之高轉換效能電流偵測與輸出漣波電壓控制降壓穩壓器
(High Efficiency Current Sensing Buck Converter with Output-Ripple-Voltage Control for Dynamic Voltage Scaling)

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摘要(中)

由於可攜式電子產品的設計朝向多功能智慧型手機發展，將多功能的晶片整合至單一系統上，電源管理晶片的發展因為高轉換效能的技術已經趨於飽和，另一方面，由於電子產品大部分時間處於低功耗狀態，電源管理晶片必須依系統需求調節負載以及輸出電壓位準，才能夠更有效降低系統的功率消耗，因此電源管理晶片具有動態電壓調整的功能成了相當重要的課題。
因應動態電壓調整的系統，在本論文為設計一個具有動態電壓轉換的電流模式與輸出漣波電壓控制降壓穩壓器，其中提出精準電感電流偵測電路取得電感電流變化，適當調整功率電晶體導通週期，調節輸出電壓位準以及提升負載調節度、線性調節度，而當輸出電壓轉換時，則透過所提出的輸出漣波電壓控制與帶差參考電壓的切換，來加速降壓穩壓器即時調節所需輸出電壓的位準、負載電流以及達到快速穩定的效能，在此，相較於傳統的輸出漣波電壓控制，則具有較廣泛的操作電壓以及高轉換效能。
此具有動態電壓轉換的電流模式降壓穩壓器是以TSMC 0.35 um 3.3V 2P4M CMOS製程實現，此晶片的工作電壓範圍為1.6 V ~ 4.9 V，操作頻率為1 MHz，提供1 V至1.8 V之間的輸出電壓轉換，在外部電感10 uH以及外部電容10 uF情況下，轉換時間為50 us，而可供應負載電流範圍為0.05 A~0.5 A，而轉換效能可達到95.5%，線性調節度為5.83 mV/V，負載調節度為0.04048 mV/mA，而晶片面積為1.44 mm2。

摘要(英)

The design of portable electronic devices is toward to the multi-function intelligent cell phone. When all functions integrated to one system, the power management is very important. On the one hand, the high transfer efficiency power chip design has been developed very well. On the other hand, according to most of the time, the electronic device is operated in low-power mode, the power management chip must adjust its loading and output voltage level according to the needs. Hence, it can lower the power consumption much more efficiently. As the result, the power management chip with dynamic voltage adjustment has become an important research topic.
In the thesis, the proposed current mode buck converter with output-ripple voltage could be operated for dynamic voltage scaling and has better load regulation, better line regulation, and faster transient response when the output voltage steps up or load current changes suddenly. Unlike conventional output-ripple-voltage control buck converter, the proposed buck converter operates in a wide-range voltage and higher conversion power efficiency.
A high efficiency current sensing buck converter with output-ripple-voltage control for dynamic voltage scaling has been implemented with TSMC 0.35 um 3.3 V 2P4M CMOS process. Measurement results show that the buck converter can be operated at 1 MHz with supply voltage from 1.6 V to 4.9 V. The output voltage can step up and down between 1 V and 1.8 V in 50 us with 10 uH off-chip inductor and 10 uF off-chip capacitor. The maximum conversion power efficiency for load current from 50 mA to 500 mA is up to 93.6%. The load regulation and line regulation are 0.04048 mV/mA and 5.83 mV/V, respectively. The chip area is 1.44 mm2.

關鍵字(中)

★ 脈衝寬度調變
★ 輸出漣波電壓
★ 動態電壓調整
★ 電流模式
★ 直流對直流降壓穩壓器

關鍵字(英)

★ pulse width modulation
★ current-mode
★ DC-DC buck converter
★ DVS
★ output-ripple-voltage

論文目次

摘要 i
Abstract ii
誌謝 iii
目錄 iv
圖目錄 vii
表目錄 x
第一章緒論 1
1.1 研究背景 1
1.2 研究動機 2
1.3 論文架構 4
第二章直流轉直流穩壓器概論 5
2.1 穩壓器種類 5
2.2 低壓降線性穩壓器(LDO) 6
2.3 切換式穩壓器(Switching Regulator) 6
2.3.1 降壓穩壓器(Buck Converter) 7
2.3.2 升壓式與升降壓式穩壓器 8
2.4 穩壓器規格定義說明 10
2.4.1 轉換效能(Efficiency) 10
2.4.2 線性調節度(Line Regulation) 12
2.4.3 負載調節度(Load Regulation) 12
2.4.4 暫態響應(Transient Response) 12
2.5 降壓穩壓器控制電路操作介紹 15
2.5.1 電壓模式控制(Voltage Mode Control) 16
2.5.2 電流模式控制（Current Mode Control） 18
2.5.3 輸出漣波電壓控制（Output-Ripple-Voltage Control） 21
第三章動態電壓調整降壓穩壓器架構 23
3.1 系統架構 23
3.2 小訊號分析 24
3.2.1 電壓模式模型分析 24
3.2.2 電流模式模型分析 32
3.3 4輸出漣波電壓控制模式分析 36
第四章動態電壓調整降壓穩壓器設計與模擬 39
4.1 帶差參考電路(Bandgap Reference) 39
4.1.1 帶差參考電路設計 40
4.1.2 帶差參考電路模擬 42
4.2 具補償器之誤差放大器 46
4.3 脈衝寬度調變控制電路(PWM Control Circuit) 47
4.3.1 遲滯比較器電路(Hysteresis Comparator Circuit) 47
4.3.2 鋸齒波振盪器電路(Sawtooth Oscillator Circuit) 48
4.3.3 緩啟動電路(Soft-Start Circuit) 50
4.4 電流偵測電路比較與模擬 (Current Sensing Circuit) 51
4.4.1 偵測電感電流電路(L-sensing) 51
4.4.2 電壓轉電流轉換器(V-I Converter) 55
4.5 輸出漣波電壓控制電路 57
4.6 動態電壓調整降壓穩壓器模擬結果 59
4.6.1 暫態模擬 60
4.6.2 規格模擬 63
第五章動態電壓調整降壓穩壓器佈局與量測 67
5.1 佈局考量 67
5.2 低壓降切換式穩壓器量測設定 69
5.3 量測結果 72
5.3.1 帶差參考電壓量測 72
5.3.2 動態電壓調整降壓穩壓器量測 74
第六章結論 83
參考文獻 84

參考文獻

[1] Texas Instruments, “Power Management Guide,” Application, Oct. 2008.
[2] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, Second Ed., Kluwer Academic Publishers, 2001.
[3] M.-K. Kazimierczuk, Pulse-width Modulated DC-DC Power Converters, New York: John Wiely & Sons. Inc., 2008.
[4] Maxim, “Regulator topologies for battery-powered Systems,” Application Note 660, Jan. 2001.
[5] G.-A. Rincon-Mora and P. E. Allen, “A low-voltage, low quiescent current, Low drop-out regulator,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 36–44, Jan. 1998.
[6] N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converter, Applications, and Design, Second Ed., New York: Wiley & Sons, 1995.
[7] T. D. Burd, A. J. Stratakos, and R. W. Brodersen, “A dynamic voltage scaled microprocessor system,” IEEE J. Solid-State Circuits, vol. 35, no. 11, pp. 1571–1871, Nov. 2000.
[8] R. B. Ridley, “A new, continuous-time model for current-mode control,” IEEE Trans. on Power Electronics, vol. 6, no. 2, pp. 271–280, Apr. 1991.
[9] B. Razavi, Design of Analog CMOS Integrated Circuits., New York: McGraw-Hill, 2001.
[10] H.P. Forghani-zadeh and Rincon-Mora G.A., “Current-sensing techniques for DC-DC converters,” in Proc. Midwest Symp. on Circuits and Systems, vol. 2, Aug. 2002, pp. II-577– II-580.
[11] C.-F. Lee and P.K.T. Mok, “A monolithic current-mode CMOS DC-DC converter with on-chip current sensing technique,” IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 3–14, Jan. 2004.
[12] C.-Y. Leung, P.K.T. Mok, and K.-N. Leung, “An integrated CMOS current-sensing circuit for low-voltage current-mode buck regulator,” IEEE Trans. on Circuits and Systems II: Express Briefs, vol. 52, no. 7, pp. 394–397, 2005
[13] M. Du and H. Lee, “A 2.5MHz, 97%-accuracy on-chip current sensor with dynamically-biased shunt feedback for current-mode switching DC-DC converters,” in Proc. IEEE Int. Symp. on Circuits and Systems, May. 2008, pp. 3274–3277.
[14] K.-H. Cheng, C.-W. Su, and H.-H. Ko, “Highly accurate and efficient current-mode PWM CMOS DC-DC buck converter with on-chip current-sensing,” IEICE Trans. on Electronics , pp. 1941–1950, Dec. 2008.
[15] S. Qu, “Modeling and design consideration of V2 controlled buck converter,” in Proc. IEEE Appl. Power Electronic, Exp., Mar. 2001, pp. 507–513.
[16] Y. Wu and P.K.T Mok, “Comparative studies of common control scheme for reference tracking and application of end-point prediction,” in Proc. IEEE Custom Integrated Circuits, Sep. 2007, pp. 559–562.
[17] Y.-Y. Mai and P.K.T Mok, “A constant frequency output-ripple-voltage- based buck converter without using large ESR capacitor” in IEEE Trans. on Circuits and Systems II, vol. 55, no. 8, pp. 748–752, Aug. 2008.
[18] P. Y. Wu and P.K.T Mok, “A Monolithic buck converter with near-optimum reference tracking response using adaptive-output-feedback,” IEEE J. Solid-State Circuits, vol. 42, no. 11, pp. 2441–2450, Nov. 2007.
[19] F. Su, W.-H. Ki, and C.-Y. Tsui, “Ultra fast fixed-frequency hysteretic buck converter with maximum charging current control and adaptive delay compensation for DVS applications,” IEEE J. Solid-State Circuits, vol. 43 no. 4, pp. 815–822, Apr. 2008.
[20] W.-C. Su and Y.-Y. Tzou, “Load current adaptive control of a monolithic CMOS DC/DC converter for dynamic power management,” in Proc. IEEE Power Electronics Specialists, Jun. 2007, pp. 370–376.
[21] M. Siu, P.K.T Mok, K. N. Leung, Y. H. Lam, and W. H. Ki, “A voltage-mode PWM buck regulator with end-point prediction,” in IEEE Trans. on Circuits and Systems II, Exp. Briefs, vol. 53, no.4, pp. 294–298, Apr. 2004.
[22] C.-Y. Leung, P.K.T. Mok, and K.-N. Leung, “A 1.2V buck converter with a novel on-chip low-voltage current-sensing scheme,” in IEEE Trans. on Circuits and Systems II, vol 5, no.5, pp. 824 –827, May 2004.
[23] C.-H. Chang and R.-C. Chang, “A novel current sensing circuit for a current-mode control CMOS DC-DC buck converter,” in Proc. IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test, Apr. 2005, pp. 120–123.
[24] H.-P. Forghani-Zadeh and G.-A. Rincon-Mora, “An accurate, continuous, and lossless self-Learning CMOS current-sensing scheme for inductor-based DC-DC converters,” IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 3–14, Mar. 2007.
[25] K.-N. Leung and P. K. T. Mok, “A sub-1-V 15-ppm/ C CMOS bandgap voltage reference without requiring low threshold voltage device,’’ IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 526–530, Apr. 2002.
[26] D.-J. Allstot, “A precision variable-supply CMOS comparator,” IEEE J. Solid-State Circuits, vol. SC-17, no. 12, pp. 1080–1087, Dec.1982.
[27] S.-Y. Wang, “ Improved Light- Load Frequency for Switched Mode Buck Converter Using PWM Operated Power-Save Mode,” NTHU MS. Thesis, 2004.
[28] C.-Y. Wang, “A Current-Mode Buck Regulator with an Adjusted-Slope Compensation Ramp,“ NCKU MS. Thesis, 2005.
[29] H.-H. Ko, “A High Efficiency Synchronous CMOS Switching Buck Regulator with Accurate Current Sensing Technique,“ NCU MS. Thesis, 2007.

指導教授

鄭國興(Kuo-Hsing Cheng)

審核日期

2009-10-19

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