博碩士論文 101522077 詳細資訊




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姓名 蔡懿婷(Yi-ting Tsai)  查詢紙本館藏   畢業系所 資訊工程學系
論文名稱 高效能雙眼立體視覺晶片設計
(Design and Implementation of High-Performance Stereo Vision ASIC)
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摘要(中) 以立體視覺為基礎的工業檢測或是機器視覺技術需要一連串高複雜度的影像處理流程,因此以軟體實現立體視覺通常需要高效能的處理器以應付複雜的演算法計算。而相對於軟體,硬體資源受限的嵌入式系統則受到成本與技術的限制,使得立體視覺於嵌入式系統開發難以實現。本研究藉由MIAT嵌入式硬體設計方法論提出一個立體視覺嵌入式硬體架構,我們先計算比對成本,然後利用樹狀結構進行視差計算,接著得到深度影像後再進行本研究所提出的視差平滑化演算法,可大幅減少物件深度因為光線與陰影造成得錯誤率,實驗結果顯示能夠有效提升偵測物件深度的準確率,減低光線與陰影的影響,在動態影像中使系統偵測的物件深度能夠穩定,不受短暫光源變化影響而變動。最後則整合成立體視覺晶片,應用在各種嵌入式系統。
摘要(英) Industrial inspection system or machine vision system are based on stereo vision technology, those systems requires a lot of highly complex image processing to implement their algorithms. Therefore, implementing stereo vision system with software usually needs high-efficiency processor to cope with calculating complex algorithms. And with respect to the software, embedded systems are subject to restrictions of cost and technology due to restriction on hardware resources. For this reasons, making the development of stereo vision in embedded systems is difficult to achieve. In this paper, we proposed a stereo vision embedded hardware architecture using MIAT embedded hardware design methodology. We first calculate the matching cost, and then use the minimum spanning tree algorithm to calculate disparity. After getting the depth of the image, we do disparity smoothing to significantly reduce the error rate of the object depth, which is caused by the light and shadow. The experimental results show that our system can effectively improve the accuracy of detection of the object depth, and reduce the impact of light and shadow. Our system detects moving objects’ depth in image can be stable, and won’t be affects by short-term changes of light. At last, we integrate all algorithms into a stereo vision chip, and applied to various embedded systems.
關鍵字(中) ★ 立體視覺 關鍵字(英) ★ stereo vision
論文目次 摘 要 I
ABSTRACT II
致謝 III
目錄 IV
圖目錄 VII
表目錄 X
第一章、緒論 1
1.1 研究背景與目標 1
1.2 論文架構 3
第二章、文獻回顧 4
2.1 立體視覺原理 4
2.2 即時立體視覺系統 8
2.3 比對成本估算 9
2.4 比對成本聚合 11
2.5 視差估算 13
2.6 視差優化 17
2.7視差平滑化 19
第三章、立體視覺晶片系統架構 21
3.1 硬體合成方法論 21
3.1.1 IDEF0階層式架構設計 22
3.1.2 Grafcet離散事件建模 25
3.1.3 VHDL硬體合成 26
3.2 立體視覺模組設計與硬體合成 29
3.2.1 雙攝影機取像模組 30
3.2.2 計算比對成本模組 30
3.2.3 計算視差模組 33
3.3 立體視覺晶片Grafcet離散事件建模 36
3.4 立體視覺晶片VHDL硬體合成 39
第四章 系統整合實驗 44
4.1實驗平台 45
4.1.1 FPGA開發板 45
4.1.2 CMOS影像感測器 46
4.1.3 軟體開發環境 48
4.2 立體視覺系統的嵌入式硬體實作 50
4.2.1計算比對成本硬體實作 50
4.2.2計算視差硬體實作 51
4.2.3 雙攝影機取像控制器硬體實作 53
4.2.4 SDRAM記憶體控制器硬體實作 54
4.2.5 VGA控制器硬體實作 55
4.2.6 主控制器 56
4.3實驗結果 57
4.3.1性能(performance)實驗 57
4.3.2效率(efficiency)實驗 59
4.3.3視差平滑化實驗 59
第五章 結論與未來研究方向 61
5.1 結論 61
5.2 未來展望 62
參考文獻 63
附錄 68
比對成本估算模組grafcet 68
比對成本聚合模組grafcet 69
視差估算模組grafcet 71
視差優化模組grafcet 72
測試圖片 73
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指導教授 陳慶瀚(Pierre Chen) 審核日期 2014-7-9
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