鍺量子點光電晶體與浮點記憶體之研製及電性分析

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：52

、訪客IP：3.145.103.100

姓名

蓋婉玉(Wan-yu Kai) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

鍺量子點光電晶體與浮點記憶體之研製及電性分析
(Characterization of Germanium Quantum Dots Phototransistors and Floating-Dot Transistors)

相關論文

★ 高效能矽鍺互補型電晶體之研製	★ 高速低功率P型矽鍺金氧半電晶體之研究
★ 應變型矽鍺通道金氧半電晶體之研製	★ 金屬矽化物薄膜與矽/矽鍺界面反應之研究
★ 矽鍺異質源/汲極結構與pn二極體之研製	★ 矽鍺/矽異質接面動態啓始電壓金氧半電晶體之研製
★ 應用於單電子電晶體之矽/鍺量子點研製	★ 矽鍺/矽異質接面動態臨界電壓電晶體及矽鍺源/汲極結構之研製
★ 選擇性氧化複晶矽鍺形成鍺量子點的光特性與光二極體研製	★ 選擇性氧化複晶矽鍺形成鍺量子點及其在金氧半浮點電容之應用
★ 鍺量子點共振穿隧二極體與電晶體之關鍵製程模組開發與元件特性	★ 自對準矽奈米線金氧半場效電晶體之研製
★ 鍺浮點記憶體之研製	★ 利用選擇性氧化單晶矽鍺形成鍺量子點之物性及電性分析
★ 具有自我對準電極鍺量子點單電洞電晶體之製作與物理特性研究	★ 具有自我對準下閘電極鍺量子點單電洞電晶體之研製

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文以金屬-氧化層-半導體 (Metal-Oxide-Semiconductor ) 場效電晶體為雛型，佐以鍺量子點於閘介電層之中來製備近紅外光光電晶體。主要閘堆疊層結構包含有100 nm 大小的鍺量子點作為光吸收層，以及選用複晶矽閘極以利後續高溫與潔淨度製程整合。利用氧化複晶矽鍺柱來形成鍺量子點，並將其埋藏在介電層中以製備光電晶體。在鍺量子點下方同時會形成有一層厚度約 4.4 nm 的矽氧化層，亦可當作浮點記憶體之穿隧氧化層，之後再藉由控制鍺量子點上方之氧化層，可製備成鍺量子點浮點記憶體。
藉由光電特性量測，可得知鍺量子點光電晶體分別在 850 nm 、980 nm 波長光源(功率分別為146 μW、102 μW) 照射下，通道關閉區域的光電流與暗電流比值可達到4.7×10^6 、1.1×10^6倍且響應度 (responsivity) 在 850 nm 、980 nm 波長光源照射下最高分別可達到 4.1、1.5 A/W。在近紅外光有極高的光暗電流比與響應度。
鍺量子點浮點記憶體在寫入/抹除偏壓分別為 8 V 及 -5 V、操作時間分別約為 60 ms 以及 30 ms 的條件下，可使得元件產生有 0.5 V 的記憶窗口。在儲存能力方面，經過10^5 秒的寫入之後，儲存的電荷量尚保存原本的 32%。在耐用性方面，元件的寫入/抹除操作次數可達到 10^5次以上，仍未見明顯的衰退。本論文呈現之鍺量子點光電晶體及浮點記憶體的製程與現今之互補式金氧半電晶體技術相容，有利於日後的實際整合與應用。

摘要(英)

A near infrared phototransistor is manufactured with the prototype of Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and germanium quantum dots (Ge QDs) in this thesis. The light absorption layer is made by 100 nm Ge QDs, and the gate electrode is made by poly-silicon to consider sequent high-temperature processes and clean integration. Ge QDs are formed by selective oxidation of SiGe pillars and buried in dielectric layer. In the meantime, there is a 4.4 nm SiO2 below the Ge QD which can be applied as a tunneling oxide of floating-dot transistor. Then, Ge QDs flash memory can be achieved by controlling the oxide on the top of Ge QDs.
Under 146 uW/102 μW illumination at 850 nm/980 nm, the photo-current-to-dark current ratio and responsivity of Ge QDs phototransistors is 4.7×106/1.1×106 tines and 4.1/1.5 A/W, respectively. The Ge QDs phototransistors exhibit high photo-current-to-dark current and responsivity at near-infrared region.
Under the conditions of write/read voltage at 8 V/-5 V and program/erase time of 60 ms/ 30 ms, the Ge QDs floating dots memory devices exhibit the memory window of 0.5 V. The charge retention properties of Ge QDs flash memory devices are 32% after 10¬5 seconds. Moreover, there do not have noticeable degradations of the Ge QDs flash memory devices after the read/write operations up to 105. In this thesis, we demonstrate the process of Ge QDs phototransistors and floating-dots memory devices which can be compatible with prevailing Si CMOS technologies.

關鍵字(中)

★ 光電晶體
★ 鍺量子點
★ 浮點記憶體

關鍵字(英)

★ phototransistor
★ Ge quantum dot
★ floating dots memory

論文目次

目錄
中文摘要 i
英文摘要 ii
致謝 iii
目錄 iv
圖目錄 vi
表目錄 x
第一章、簡介與研究動機 1
1-1 光電晶體簡介與研究動機 1
1-2 浮點記憶體簡介與研究動機 3

第二章、光電晶體之鍺量子點特性與元件設計製作 10
2-1 鍺量子點如何形成與激發光光譜 10
2-2 光電晶體元件設計與操作原理 11
2-3 元件製程流程 12

第三章、浮點記憶體操作原理 24
3-1 浮點記憶體寫入與抹除原理 24
3-2 載子傳輸機制 24
3-2-1 直接穿隧機制 25
3-2-2 Fowler-Nordheim注入 26
3-2-3 Frenkel-Poole 注入 26
3-2-4 通道熱載子注入 27
3-3 元件穿隧機制討論 28

第四章、元件量測與分析 33
4-1 光電晶體電性與光性量測 33
4-1-1 光電晶體未照光下之電氣特性 33
4-1-2 光電晶體照光下之電氣特性 36
4-2 浮點記憶體量測 41
4-2-1 寫入電壓與速度 41
4-2-2 抹除電壓與速度 42
4-2-3 儲存時間 42
4-2-4 耐用性 43

第五章、總結與未來展望 57
參考文獻 59

參考文獻

參考文獻
[1] H. J. R. Dutton, “Understanding Optical Communications,” p4, 1998.
[2] J. Michel et al., “High-performance Ge-on-Si photodetectors,” Nature Photonics, 4, p527, 2010.
[3] Jifeng Liu et al., “Tensile-strained, n-type Ge as a gain medium for monolithic laser integration on Si,” Optics express, 15, p18, 2007.
[4] 郭銘浩，““量身訂作”鍺量子點以應用於近紅外線光偵測元件之研製”，碩士論文，國立中央大學，民國 102 年。
[5] Peter Ashbum, “SiGe Heterojunction Bipolar Transistors,” John Wiley and Sons, 2003.
[6] Roosevelt people, “Physics and application of GexSi1-x/Si strained-layer heterostructures,” IEEE Journal of Quantum Electronics, 22, p1696, 1986.
[7] D. J. Eaglesham and M. Cerullo, “Dislocation-free Stranski-Krastanow growth of Ge onSi(100),” Physical review letters, 64, p1943, 1990.
[8] F. K. LeGoues et al., “Anomalous strain relaxation in SiGe thin films and superlattices,” Physical review letters, 66, p2903, 1991.
[9] T. K. P. Luong et al., “Control of tensile strain and interdiffusion in Ge/Si(001) epilayers grown by molecular-beam epitaxy,” Physical review letters, 114, p083504, 2013.
[10] D. Kahng and S. M. Sze, Bell Syst. Techn. J., 46, p1288, 1967.
[11] 楊露瑜，“應用氮化矽做為穿隧介電層之鍺量子點電晶體之研製”，碩士論文，國立中央大學，民國 97 年。
[12] M. H. Kuo et al., “Designer Ge quantum dots on Si: A heterostructure configuration with enhanced optoelectronic performance,” Physical review letters, 101, p223107, 2012.
[13] C. Y. Chien et al., “Nanoscale, catalytically enhanced local oxidation of silicon-containing layers by ‘burrowing’ Ge quantum dots,” Nanotechnology, 22, p 435602, 2011.
[14] Chuan-Hsi Liu and Jin-Lai Chen, “Semiconductor Device Physics and Process: Theory & Practice,” Wu nan, p235, 2006.
[15] A. S. Grove, “Physics and Technology of Semiconductor Devices,” John Wiley and Sons, 1967.
[16] S. M. Sze and Kwok K. Ng, “Physics of Semiconductor Device,” 3nd edition, Section 8.3.2., John Wiley and Sons, 2007.
[17] S. M. Sze and Kwok K. Ng, “Physics of Semiconductor Device,” 3nd edition, Section 4.3.4., John Wiley and Sons, 2007.
[18] Y. Takahashi and K. Ohnishi, “Estimation of Insulation Layer Conductance in MNOS Structure,” IEEE Transactions on electron devices, 40, p2006, 1993.
[19] S. M. Sze and Kwok K. Ng, “Physics of Semiconductor Device,” 3nd edition, Section 6.7.1., John Wiley and Sons, 2007.
[20] K. K. Ng and G. W. Taylor, “Effects of Hot-Carrier Trapping in n- and p-Channel　MOSFET’s,” IEEE Transactions on electron devices, 30, p871, 1983.
[21] S. M. Sze and Kwok K. Ng, “Physics of Semiconductor Device,” 3nd edition, Section 6.2.4., John Wiley and Sons, 2007.
[22] S. M. Sze and Kwok K. Ng, “Physics of Semiconductor Device,” 3nd edition, Section 6.2.2., John Wiley and Sons, 2007.
[23] M. H. Kuo et al., “Designer Germanium Quantum Dot Phototransistor for Near Infrared Optical Detection and Amplification,” Nanoscale, 2014, publishing.
[24] Ali K. Okyay et al., “Silicon Germanium CMOS Optoelectronic Switching Device: Bringing Light to Latch,” IEEE Transactions on electron devices, 54, p12, 2007.
[25] C. Y. Chien et al., “Size tunable Ge quantum dots for near-ultraviolet to near-infrared photosensing with high figure of merits,” Nanoscale, 6, p 5053, 2014.

指導教授

李佩雯(Pei-wen Li)

審核日期

2014-8-14

推文