氮化鋁鎵/氮化鎵高電子遷移率場效電晶體之表面氧化研究

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：81

、訪客IP：3.145.156.250

姓名

許家維(Chia wei Hsu) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

氮化鋁鎵/氮化鎵高電子遷移率場效電晶體之表面氧化研究

相關論文

★ 電子式基因序列偵測晶片之原型	★ 增強型與空乏型砷化鋁鎵/砷化銦鎵假晶格高電子遷移率電晶體: 元件特性、模型與電路應用
★ 使用覆晶技術之微波與毫米波積體電路	★ 注入增強型與電場終止型之絕緣閘雙極性電晶體佈局設計與分析
★ 以標準CMOS製程實現之850 nm矽光檢測器	★ 600 V新型溝渠式載子儲存絕緣閘雙極性電晶體之設計
★ 具有低摻雜Ｐ型緩衝層與穿透型Ｐ＋射源結構之600V穿透式絕緣閘雙極性電晶體	★ 雙閘極金氧半場效電晶體與電路應用
★ 空乏型功率金屬氧化物半導體場效電晶體設計、模擬與特性分析	★ 高頻氮化鋁鎵/氮化鎵高速電子遷移率電晶體佈局設計及特性分析
★ 氮化鎵電晶體 SPICE 模型建立與反向導通特性分析	★ 加強型氮化鎵電晶體之閘極電流與電容研究和長時間測量分析
★ 新型加強型氮化鎵高電子遷移率電晶體之電性探討	★ 氮化鎵蕭特基二極體與高電子遷移率電晶體之設計與製作
★ 整合蕭特基p型氮化鎵閘極二極體與加強型p型氮化鎵閘極高電子遷移率電晶體之新型電晶體	★ 垂直型氧化鎵蕭特基二極體於氧化鎵基板之製作與特性分析

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文主要針對在高阻值矽(111)基板上進行氮化鋁/氮化鋁鎵/氮化鋁/氮化鎵電晶體製作與研究，希望藉由以後製程氧化表面氮化鋁，使隨後沉積的閘極絕緣層能具有更好的品質。
本論文使用的閘極絕緣層材料為二氧化矽，而氧化表面製程採用氮氣與氧氣的混合氣體在溫度為900°C持續150秒，加上薄膜氧化層之熱退火，進而改善了金氧半接面的漏電流、降低接面缺陷密度。在經過氧化表面和薄膜氧化層之熱退火所製程之金氧半接面，其閘極漏電流為10-5 A/cm2相較於蕭特基閘極場效電體降低了約為五個數量級，且相較於未經高溫氧化製程的金氧半接面低約二個數量級；然而在接面缺陷密度的表現上，經氧化製程的金氧半接面的缺陷密度較高，估計是氧化製程導致表層氮化鋁/氮化鋁鎵接面品質劣化所致。
更進一步的將此製程技術應用至金氧半場效電晶體的製作上，並針對蕭特基閘極場效電晶體與金氧半場效電晶體的動態導通電阻的進行量測分析，結果發現，相較於蕭基特場效電晶體，金氧半場效電晶體可獲得較低的動態電阻/穩態導通電阻比值，然而在經過氧化表面後的元件，在高電場下動態特性的劣化將較未經氧化的元件嚴重，此結果亦說明當元件承受高電場時，介面缺陷密度對元件的影響甚劇。

摘要(英)

This study focuses on the fabrication and characterization of AlN/AlGaN/AlN/GaN HEMTs on high-resistivity Si（111）substrate. The thermal oxidation is proposed before gate dielectric deposition to achieve the high quality gate dielectric and lower interface state density.
To fabricate metal-oxide-semiconductor high-electron-mobility-transistors (HEMTs), SiO2 gate dielectrics with thermal oxidation process was used in this study. The thermal oxidation process was using N2/O2 at 900 C for 150 sec before the gate dielectrics deposition. After SiO2 deposition, devices with post-deposition annealing（in N2 ambient at 1000 C）was investigated. MOS capacitor fabricated with and without thermal oxidation were investigated and compared. The MOS capacitor with thermal oxidation showed the gate leakage current of 10-5 A/cm2, which is lower than the device without thermal oxidation by twofold. However, the interface state density showed higher value in the device with thermal oxidation, the possible reason is the interface between AlN and AlGaN was damaged after thermal oxidation.
In addition, dynamic resistances of the Schottky-gate HEMTs and metal-oxide-semiconductor HEMTs were analyzed. The experimental results showed that metal-oxide-semiconductor HEMTs demonstrated lower dynamic on-resistance to steady-state on-resistance ratio. However, the device with thermal oxidation showed higher dynamic resistance to steady-state resistance ratio than the device without thermal oxidation at high electric field. This results revealed the interface state density would dominate at high electric field. Moreover, the temperature dependence of the threshold voltage and the correlation with the interface state density were discussed.

關鍵字(中)

★ 氮化鋁鎵/氮化鎵
★ 高電子遷移率場效電晶體

關鍵字(英)

論文目次

中文摘要 I
Abstract II
致謝 III
圖目錄 VI
表目錄 X
第一章緒論 1
1.1前言 1
1.2氮化鎵高電子遷移率場效電晶體之發展與相關表面製程研究 3
1.3本論文研究動機與目的 9
1.4論文架構 9
第二章氮化鋁鎵/氮化鎵場效電晶體於矽基板電晶體之磊晶與製程 10
2.1 前言 10
2.2 氮化鋁鎵/氮化鎵於矽基板之磊晶結構 10
2.2.1緩衝層X光繞射儀量測分析 13
2.2.2 霍爾量測與分析 14
2.3蕭特基閘極場效電晶體製作與特性分析 15
2.3.1 電晶體佈局 15
2.3.2蕭特基閘極場效電晶體製作流程 15
2.3.3蕭特基閘極場效電晶體直流特性分析 18
2-4結論 22
第三章氮化鋁鎵/氮化鎵金氧半電容與電晶體特性分析與比較 23
3.1前言 23
3.2氮化鋁鎵/氮化鎵金氧半電容製作流程 23
3.3氮化鋁鎵/氮化鎵金氧半電容特性分析 25
3.3.1閘極電容基本量測介紹 27
3.3.2電容-電壓特性曲線 28
3.3.3電容-電壓曲線萃取介面缺陷密度 31
3.4 爐管熱退火之氮化鋁鎵/氮化鎵金氧半場效電晶體製作與分析 34
3.4.1 爐管熱退火之氮化鋁鎵/氮化鎵金氧半場效電晶體製作流程 34
3.4.2 爐管熱退火之氮化鋁鎵/氮化鎵金氧半場效電晶體特性分析 36
3.4.3電容-電壓曲線萃取介面缺陷密度 39
3.5 快速熱退火之氮化鋁鎵/氮化鎵金氧半場效電晶體製作與分析 41
3.5.1 快速熱退火之氮化鋁鎵/氮化鎵金氧半場效電晶體製作流程 41
3.5.2 快速熱退火之氮化鋁鎵/氮化鎵金氧半場效電晶體特性分析 45
3.5.3電容-電壓曲線萃取介面缺陷密度 48
3.6 結論 50
第四章氮化鋁鎵/氮化鎵場效電晶體之電流崩塌效應與變溫量測分析 51
4.1前言 51
4.2氮化鋁鎵/氮化鎵場效電晶體之電流崩塌效應 51
4.2.1電流崩塌效應簡介 51
4.2.2蕭特基閘極與金氧半場效電晶體之電流崩塌效應分析與比較 53
4.3氮化鋁鎵/氮化鎵金氧半場效電晶體之變溫量測特性 58
4.3.1氮化鋁鎵/氮化鎵金氧半場效電容之變溫量測 60
4.4 結論 64
第五章結論與未來展望 65
參考文獻 66
附錄Ⅰ 蕭特基閘極場效電晶體製作流程 69
附錄Ⅱ 金氧半場效電晶體製作流程 71

參考文獻

[1] L. F. Eastman and U. K. Mishra, “The toughest transistor yet GaN transistors,” IEEE Spectrum, vol. 39, pp. 28-33, May 2002.
[2] Wayne Johnson and Edwin L. Piner, “GaN HEMT Technology,” W. Johnson., Kopin Corporation.,2012.
[3] Yow-Jon Lin, “Application of the thermionic field emission model in the study of a Schottky barrier of Ni on p-GaN from current–voltage measurements,” Appl. Phys. Lett. 86, 122109, March 2005.
[4] Amro Anwar, Bahram Nabet, James Culp, and Fransisco Castro, “Effects of electron confinement on thermionic emission current in a modulation doped heterostructure,” Appl. Phys. Lett. Vol. 85, no. 5, March 1999.
[5] Yuanzheng Yue, Yue Hao, Jincheng Zhang, Jinyu Ni, Wei Mao, Qian Feng and Linjie Liu, “AlGaN/GaN MOS-HEMT With HfO2 Dielectric and Al2O3 interfacial passivation layer Grown by atomic layer deposition,” IEEE Electron Device Lett., vol. 29, no 8, pp. 838-840, Aug. 2008.
[6] Liang Pang, Yaguang Lian, Dong-Seok Kim, Jung-Hee Lee and Kyekyoon Kim, “AlGaN/GaN MOSHEMT with High-Quality Gate-SiO2 Achieved by Room-Temperature Radio Frequency Magnetron Sputtering,” IEEE Trans. Electron Devices., vol. 59, no. 10, pp. 2650-2655, Oct. 2012.
[7] T. Lalinsky´, G. Vanko, M. Vallo, E. Dobrocˇka, I. Ry´ger, and A. Vincze, “AlGaN/GaN high electron mobility transistors with nickel oxide based gates formed by high temperature oxidation,” Appl. Phys. Lett., 100, 092105, Feb. 2012.
[8] Han-Yin Liu, Bo-Yi Chou, Wei-Chou Hsu, Ching-Sung Lee, Jinn-Kong Sheu, and Chiu-Sheng Ho, “Enhanced AlGaN/GaN MOS-HEMT Performance by Using Hydroden Peroxide Oxidation Technique,” IEEE Trans. Electron Devices., vol. 60, no. 1, pp. 213-219, Jan. 2013.
[9] Masafumi Tajima, Junji Kotani, and Tamotsu Hashizume, “Effects of Surface Oxidation of AlGaN on DC Characteristics of AlGaN/GaN High-Electron-Mobility Transistors,” Jpn. J. Appl. Phys. 48 (2009) 020203.
[10] F. Medjdoub, M. Van Hove, K. Cheng, D. Marcon, M. Leys, and S. Decoutere, “Novel E-Mode GaN-on-Si MOSHEMT using a Selective Thermal Oxidation,” IEEE Electron Device Lett., vol. 31, no. 9, pp. 948-950, Sep. 2010.
[11] Naohisa Harada, Yujin Hori, Naoki Azumaishi, Kota Ohi, and Tamotsu Hashizume, “Formation of Recessed-Oxide Gate for Normally-Off AlGaN/GaN High Electron Mobility Transistors Using Selective Electrochemical Oxidation,” Appl. Phys Express, 4, (2011) 021002.
[12] Dong Seup Lee, Jinwook W. Chung, Han Wang, Xiang Gao, Shiping Guo, Patrick Fay, and Tomás Palacios, “245-GHz InAlN/GaN HEMTs With Oxygen Plasma Treatment,” IEEE Electron Device Lett., vol. 32, no. 6, pp. 755-757, June. 2011.
[13] Junichi Kashiwagi, Tetsuya Fujiwara, Minoru Akutsu, Norikazu Ito, Kentaro Chikamatsu, and Ken Nakahara, “Recessed-Gate Enhancement-Mode GaN MOSFETs with a Double-Insulator Gate Providing 10-MHz Switching Operation,” IEEE Electron Device Lett., vol. 34, no. 9, pp. 1109-1111, Sep. 2013.
[14] Yi-Che Lee, Tsung-Ting Kao, Joseph J. Merola, and Shyh-Chiang Shen, “A Remote-Oxygen-Plasma Surface Treatment Technique for lll-Nitride Heterojunction Field-Effect Transistors,” IEEE Trans. Electron Devices., vol. 61, no. 2, pp. 493-497, Feb. 2014.
[15] Y. Hori, Z. Yatabe, and T. Hashizume, “Characterization of interface states in Al2O3/AlGaN/GaN structures for improved performance of high-electron-mobility transistors,” Appl. Phys. Lett., 114, 244503, Dec. 2013.
[16] X. Sun, O. I. Saadat, K. S. Chang-Liao, T. Palacios, S. Cui, and T. P. Ma, “ Study of gate oxide traps in HfO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors by use of ac transconductance method,” Appl. Phys. Lett., 102, 103504, 2013.
[17] Y. Q. Wu, T. Shen, P. D. Ye, and G. D. Wilk, “Photo-assisted capacitance-voltage characterization of high-quality atomic-layer-deposited Al2O3/GaN metal-oxide-semiconductor structures,” Appl. Phys. Lett., 90, 143504, 2007.
[18] Rathnait D. Long and Paul C. McIntyre, “Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices,” Materials 2012, 5, 1297-1335.
[19] W. uang,T. khan, and T. paul chow, “Comparison of MOS Capacitors on n- and p-Type GaN,” Journal of Electron Materials., Vol. 35, No. 4, pp. 726-732, 2006
[20] Hiroshi Kambayashi, Takehiko Nomura1, Sadahiro Kato1, Hirokazu Ueda,Akinobu Teramoto, Shigetoshi Sugawa, and Tadahiro Ohmi, “High Integrity SiO2 Gate Insulator Formed by Microwave-Excited Plasma Enhanced Chemical Vapor Deposition for AlGaN/GaN Hybrid Metal-Oxide-Semiconductor Heterojunction Field-Effect Transistor on Si Substrate,” Jpn. J. Appl. Phys. 51 (2012) 04DF03.
[21] O. Ambacher, J. Smart, J. R. Shealy, N. G. Weimann, K. Chu, M. Murphy, W. J. Schaff, and L. F. Eastman, “Two-dimensional electron gases induced by spontaneous and piezoelectric polarization charges in N- Ga-face AlGaN/GaN heterostructures,” Appl. Phys., vol. 85, no. 6, pp.3222-333, Mar. 1999.
[22] Y. C. Kong, Y.D. Zheng, C. H. Zhou, S.L. Gu, R. Zhang, P. han, Y. Shi, R. l. Jiang, “ Two-dimensional electron gas densities in AlGaN/AlN/GaN heterostructures,” Appl. Phys. A 84, 95–98, 2006.
[23] B. Heying, “Role of threading dislocation structure on the x-ray diffraction peak widths in epitaxial GaN films”, Appl. Phys. Lett., Vol. 68, 643 (1996)
[24] Chihoko Mizue, Yujin Hori, Marcin Miczek, and Tamotsu Hashizume, “Capacitance–Voltage Characteristics of Al2O3/AlGaN/GaN Structures and State Density Distribution at Al2O3,AlGaN Interface” Jpn. J. Appl. Phys., 50 (2011) 021001.
[25] Sen Huang, Qimeng Jiang, Shu Yang, Zhikai Tang, and Kevin J. Chen, “Mechanism of PEALD-Grown AlN Passivation for AlGaN/GaN HEMTs: Compensation of Interface Traps by Polarization Charges,” IEEE Electron Device Lett., vol. 34, no. 2, pp. 193-195 Feb. 2013.
[26] M. J. Anand, G. I. Ng, S. Vicknesh, S. Arulkumaran, and K. Ranjan, “Reduction of current collapse in AlGaN/GaN MISHEMT with bilayer SiN/Al2O3 dielectric gate stack,” phys. Status Solid C 10, No. 11, 1421-1325, 2013.

指導教授

辛裕明(Yue ming Hsin)

審核日期

2014-8-15

推文