標準CMOS製程結合後製程之850-nm矽累崩光檢測器

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黃智愛(Chih-Ai Huang) 查詢紙本館藏

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電機工程學系

論文名稱

標準CMOS製程結合後製程之850-nm矽累崩光檢測器
(850-nm Si Avalanche Photodiodes in Standard CMOS Technology with Back-end Process)

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摘要(中)

本論文利用0.18 µm標準CMOS製程結合後製程實現850-nm矽累崩光檢測器，為了排除基板空乏區外照光而產生之擴散載子，利用後製程來蝕刻元件之背面基板，達到直接排除擴散載子之效果。透過Silvaco公司之二維元件模擬軟體研究，基板厚度的減少可改善擴散載子造成之頻率響應滑落(roll-off)的情形，進而提升3-dB頻寬。同時針對不同的元件結構設計，分別為水平式之累崩光檢測器以及P-I-N結構之光檢測器，將其操作在累崩區來做比較。最後並接著針對矽累崩光檢測器之吸光區尺寸作進一步的分析，透過金屬層區隔累崩區及吸光區，隨著吸光區寬度的減少，所收集到的光電流中擴散載子成份也會下降，使得元件之3-dB頻寬提升至8 GHz。另外也利用光脈衝響應之量測，研究不同元件對脈衝的反應，分析出長尾巴效應(long tail effect)的存在與頻寬的關係。

摘要(英)

This study presents lateral avalanche photodetectors (APDs) implemented in standard 0.18 µm CMOS technology operating at 850-nm wavelength. In order to reduce the slow diffusion carriers generated within the Si substrate, it is necessary to utilize simple back-end processes after standard CMOS process to remove thick Si substrate. Silvaco TCAD simulation is used to verify that the diffusion roll-off in APD could be improved by reducing the diffusion component of photo-current by thinning the Si substrate. Furthermore, this study compared different device structures including avalanche photodetectors and P-I-N photodetectors after substrate thinning. Finally, the different absorption region widths of APDs are discussed. While the absorption region width decreased, the amount of diffusion carriers is reduced in photo-current and thus achieved 3-dB bandwidth of 8 GHz. Besides, long tail effect in connection with frequency response can be verified by the pulse measurement.

關鍵字(中)

★ 光檢測器
★ 標準CMOS製程
★ 後製程

關鍵字(英)

★ Photodiodes
★ CMOS
★ Back-end Process

論文目次

摘要 i
Abstract ii
致謝 iii
圖目錄 vi
表目錄 xi
第一章導論 1
1.1 研究動機 1
1.2 相關研究發展 6
1.3 論文架構 16
第二章光檢測器簡介 18
2.1 簡介 18
2.2 基本原理及特性 18
2.2.1 光檢測器工作原理 18
2.2.2 響應度及累崩增益 20
2.2.3 響應時間分析 23
2.2.4 雜訊分析 24
2.3 以標準CMOS製程實現光檢測器 25
2.4 結論 30
第三章標準CMOS製程結合後製程之累崩光檢測器 31
3.1 簡介 31
3.2 元件模擬及設計 31
3.2.1 頻率響應之分析 31
3.2.2 元件特性比較 35
3.2.3 元件設計與CMOS製程 38
3.3 後製程介紹 41
3.3.1 蝕刻方法 41
3.3.2 元件特性之影響 45
3.4 元件量測結果 50
3.4.1 元件直流特性及響應度 50
3.4.2 元件頻率響應及光脈衝響應 58
3.4.3 元件雜訊 63
3.4.4 元件特性整理 65
3.5 結論 66
第四章累崩光檢測器之吸光區分析 68
4.1 簡介 68
4.2 元件設計 68
4.3 元件量測結果 70
4.3.1 元件直流特性及響應度 71
4.3.2 元件頻率響應及光脈衝響應 79
4.3.3 元件雜訊 83
4.3.4 元件特性整理 84
4.4 元件模擬驗證 86
4.5 結論 88
第五章總結 90
參考文獻 91
附錄 94

參考文獻

[1] H. J. R. Dutton, “Understanding Optical Communications,” 1998.
[2] Yasuhiro Koike and Makoto Asai, “The future of plastic optical fiber,” NPG Asia Materials, vol.1, pp. 22-28, Oct. 2009.
[3] Toshihiko Komine, and Masao Nakagawa, “Integrated system of white LED visible-light communication and power-line communication,” IEEE Trans. on Consumer Electron., vol. 49, no. 1, pp. 71-79, Feb. 2003.
[4] Fang-Ming Wu, Chun-Ting Lin, Chia-Chien Wei, Cheng-Wei Chen, Hou-Tzu Huang, and Chun-Hung Ho, “1.1-Gb/s white-LED-based visible light communication employing carrier-less amplitude and phase modulation,” IEEE Photon. Technol. Lett., vol. 24, no. 19, pp. 1730-1732, Oct. 2012.
[5] Shinichiro Haruyama, “Visible light communication using sustainable led lights,” ITU Kaleidoscope Academic Conf., pp. 1-6, 2013.
[6] S. Radovanovic´, Anne-Johan Annema, and Bram Nauta, "A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication," IEEE J. of Solid-State Circuits, vol. 40, no. 8, pp. 1706-1717, Aug. 2005.
[7] M. Jutzi, M. Grözing, E. Gaugler, W. Mazioschek, and M. Berroth, "2-Gb/s CMOS optical integrated receiver with a spatially modulated photodetector" IEEE Photon. Technol. Lett., vol. 17, no. 6, pp. 1268-1270, Jun. 2005.
[8] B. Yang, J. D. Schaub, S. M. Csutak, D. L. Rogers, and J. C. Campbell, "10-Gb/s all-silicon optical receiver," IEEE Photon. Technol. Lett., vol. 15, no. 5, pp. 745-747, May 2003.
[9] H. J. R. Dutton, Understanding Optical Communications, pp. 4-10, Sep. 1998.
[10] Myung-Jae Lee, and Woo-Young Choi, “Area-dependent photodetection frequency response characterization of Silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Trans. on Electron Devices, vol. 60, no. 3, pp. 998-1004, Mar. 2013.
[11] Dongmyung Lee, Jungwon Han, Gunhee Han, and Sung Min Park,” An 8.5-Gb/s fully integrated CMOS optoelectronic receiver using slope-detection adaptive equalizer,” IEEE J. of Solid-State Circuits, vol. 45, no. 12, pp. 2861-2873, Dec. 2010.
[12] Berkehan Ciftcioglu, Jie Zhang, Lin Zhang, John R. Marciante, Jonathan D. Zuegel, Roman Sobolewski, and Hui Wu, “3-GHz Silicon photodiodes integrated in a 0.18-µm CMOS technology,” IEEE Photon. Technol. Lett., vol. 20, no. 24, pp. 2069-2071, Dec. 2008.
[13] Quan Pan, Zhengxiong Hou, Yu Li, Andrew W. Poon, and C. Patrick Yue, “A 0.5-V P-well/deep N-well photodetector in 65-nm CMOS for monolithic 850-nm optical receivers,” IEEE Photon. Technol. Lett., vol. 26, no. 12, pp. 1184-1187, Jun. 2014.
[14] W.-K. Huang, Y.-C. Liu and Y.-M. Hsin, “Bandwidth enhancement in Si photodiode by eliminating slow diffusion photocarriers,” Electron. Lett., vol. 44, no. 1, pp. 52-53, Jan. 2008.
[15] Fang-Ping Chou, Guan-Yu Chen, Ching-Wen Wang, Zi-Ying Li, Yu-Chang Liu, Wei-Kuo Huang, and Yue-Ming Hsin, “Design and analysis for a 850 nm Si photodiode using the body bias technique for low-voltage operation,” J. of Lightwave Technol., vol. 31, no. 6, pp. 936-941, Mar. 2013.
[16] Yu-Chen Hsieh, Fang-Ping Chou, Ching-Wen Wang, Chih-Ai Huang, and Yue-Ming Hsin, “850-nm edge-illuminated Si photodiodes fabricated with CMOS-MEMS technology,” IEEE Photon. Technol. Lett., vol. 25, no. 20, pp. 2018-2021, Oct. 2013.
[17] Filip Tavernier, and Michel S. J. Steyaert, “High-speed optical receivers with integrated photodiode in 130 nm CMOS,” IEEE J. of Solid-State Circuits, vol. 44, no. 10, pp. 2856-2867, Oct. 2009.
[18] Kasap, S. O., Optoelectronics and photonics: principles and practices, Prentice Hall, 2001.
[19] Gerd Keiser, Optical Fiber Communications, McGRAW Hill, pp.536-555, 2000.
[20] S. M. Sze, Physics of Semiconductor Devices, 3rd ed. John Wiley & Sons Inc, 2007.
[21] S. Radovanovic, “High-Speed Photodiodes in Standard CMOS Technology,” Print Partners Ipskamp, 2004.
[22] H. Zimmermann, Integrated Silicon Optoelectronics. New York: Springer, 2000.
[23] Safa O. Kasap, Optoelectronics and Photonics: Principles and Practices, 2009.
[24] Lucio Pancheri, Mauro Scandiuzzo, David Stoppa, and Gian-Franco Dalla Betta, “Low-noise avalanche photodiode in standard 0.35-μm CMOS technology,” IEEE Trans. on Electron Devices, vol. 55, no. 1, pp. 457-461, Jan. 2008.
[25] R. J. McIntyre, “Multiplication noise in uniform avalanche diodes,” IEEE Trans. Electron Devices, vol. ED-13, no. 1, pp. 164-168, Jan. 1966.
[26] G. P. Agrawal, Fiber-Optical Communication Systems. John Wiley & Sons Inc, 2002.
[27] S. Radovanovic, A. J. Annema and B. Nauta., “Physical and electrical bandwidths of integrated photodiodes in standard CMOS technology,” IEEE Conf. on Electron Devices and Solid-State Circuits, pp. 95-98, Dec. 2003.
[28] New Focus, Inc., “Insights into High-Speed Detectors and High-Frequency Techniques.” Application Notes, no.1
[29] S. G. Thomas, et al., "CMOS-compatible photodetector fabricated on thick SOI having deep implanted electrodes," Electron. Lett., vol. 38, no. 20, pp. 1202-1204, Sep. 2002.
[30] F.-P. Chou, C.-W. Wang, Z.-Y. Li, Y.-C. Hsieh, and Y.-M. Hsin, “Effect of deep N-well bias in an 850-nm Si photodiode fabricated using the CMOS process,” IEEE Photon. Technol. Lett., vol. 25, no. 7, pp. 659-662, Apr. 2013.
[31] Behrooz Nakhkoob, Sagar Ray, and Mona M. Hella, “High speed photodiodes in standard nanometer scale CMOS technology: a comparative study,” Opt. Express, vol. 20, no. 10, pp. 11256-11270, May 2012.
[32] S. B. Alexander, Optical Communication Receiver Design, SPIE Optical Engineering Press, 1997.
[33] R. Fujimoto, et al., “A 7-GHz 1.8-dB NF CMOS low-noise amplifier,” IEEE J. of Solid-State Circuits, vol. 37, no.7, pp. 852-856, Jul. 2002.
[34] Rob Legtenberg, Henri Jansen, Meint de Boer, and Miko Elwenspoek, “Anisotrapic reactive ion etching of Silicon using SF6/O2/CHF3 gas mixtures,” J. Electrochem. Soc., vol. 142, no. 6, pp. 2020-2028, Jun. 1995.

指導教授

辛裕明(Yue-ming Hsin)

審核日期

2014-8-19

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