用於生理訊號擷取系統之自動化類比設計平台

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連映琦(Ying-chi Lien) 查詢紙本館藏

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電機工程學系

論文名稱

用於生理訊號擷取系統之自動化類比設計平台
(Automatic Analog Synthesis Platform for Bio-signal Acquisition System)

相關論文

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摘要(中)

現今積體電路應用層面越來越廣泛，使得電路設計複雜度和需求日漸增高，所要考慮的設計條件也跟著變多。在健康照護的應用中，生理訊號擷取是偵測疾病相當重要的一環，然而，生理訊號相當微弱，很容易受到雜訊影響導致難以判讀，如何去降低雜訊對原始訊號的干擾，對生醫系統設計來說是一門重要的課題。本論文提出一套考量雜訊效應的類比電路系統自動化設計帄台，在電路尺寸調整流程中，加入相關雜訊的計算，並使用雜訊指數作評估，盡量降低電路受到雜訊的影響，最後可經由操作客製化的圖形介面，快速得到相對應的電路設計與電路佈局。整套自動化類比設計平台在LINUX上實現，在線性規劃(linear programming)的部分用CPLEX來找尋最佳解，而在自動產生電路佈局上則是以C/C++及Tcl/Tk程式語言實現，並能在Laker環境下自動化完成佈局的過程。由模擬結果及晶片量測的數據觀察可知，本工具自動合成的運算放大器可成功應用在生理訊號擷取系統上，在加入雜訊考量後，整體的雜訊也確實縮小了。

摘要(英)

The integrated circuits of nowadays have more and more applications. More functionality increases the complexity of circuit design, which also increases the conditions that have to be considered in the design process. In health care application, the bio-signal acquisition system is important to diagnose the diseases. However, because the bio-signals are often very weak, they can be influenced by noise easily
and become hard to distinguish. How to reduce the noise impacts on bio-signals is important in bio-system design. In this thesis, an automatic analog synthesis platform is presented to generate the required system from specification to layout with noise consideration. Noise Factor (NF) is introduced in the proposed circuit sizing flow to evaluate the noise impact and guide the optimization toward noise reduction. Finally,with a friendly Graphical User Interface (GUI), the required design and its corresponding layout can be generated in seconds. The whole synthesis platform has
been implemented in Linux with the optimization tool CPLEX, incorporating with an automatic layout generation platform implemented with C/C++ and Tcl/Tk on Laker. According to the simulation and chip measurement results, the automatically synthesized OPA can be used in the bio-signal acquisition system successfully. With noise consideration, the overall noise is also greatly reduced in noise simulation.

關鍵字(中)

★ 設計自動化
★ 電路合成

關鍵字(英)

論文目次

摘要.....................................i
Abstract................................ii
目錄.....................................iv
圖目錄....................................vi
表目錄....................................ix
第一章、緒論................................1
1-1 研究動機................................1
1-2 相關研究................................4
1-2-1 考慮雜訊於電路設計......................4
1-2-2 考慮佈局效應之類比設計自動化工具...........5
1-3 問題定義................................6
1-4 論文結構................................7
第二章、背景知識..............................8
2-1 電路架構.................................8
2-1-1 兩級式運算放大器........................9
2-1-2 儀表放大器.............................10
2-1-3 濾波電路...............................10
2-1-4 放大電路...............................12
2-1-5 類比緩衝器.............................12
2-2 電壓驅動設計方法..........................13
2-2-1 gm/ID方法.............................14
2-2-2 限制條件與目標函數.......................18
2-2-3 取得電晶體尺寸..........................20
2-2-4 電壓驅動設計流程.........................21
2-3 佈局環境介紹..............................22
2-3-1 Laker軟體和Tcl/Tk語法...................22
2-3-2 電晶體.................................23
2-3-3 電阻和電容..............................24
第三章、雜訊考量...............................26
3-1 雜訊型態..................................26
3-1-1 熱雜訊.................................26
3-1-2 閃爍雜訊................................28
3-1-3 電路中雜訊的表示.........................29
3-2 單級放大器雜訊分析..........................30
3-3兩級式運算放大器雜訊分析......................31
3-3-1 第一級雜訊..............................32
3-3-2 第二級雜訊..............................34
3-4 目標函數...................................35
3-4-1 面積目標函數..............................35
3-4-2 雜訊指數目標函數...........................36
第四章、圖形化使用者介面...........................38
第五章、實驗結果與分析............................46
5-1 實驗環境....................................46
5-2 實驗結果....................................47
5-2-1實驗數據...................................47
5-2-2晶片下線量測結果......................,......48
第六章、結論和未來研究方向..........................53
第七章、參考文獻..................................54

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指導教授

劉建男(Chien-Nan Liu)

審核日期

2014-8-27

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