| 姓名 |
翁銘聖(Ming-Sheng Weng)
查詢紙本館藏 |
畢業系所 |
電機工程學系 |
| 論文名稱 |
串聯電阻陣列之金屬層可交換式平衡繞線
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| 相關論文 | |
| 檔案 |
 [Endnote RIS 格式]
[Bibtex 格式]
 [相關文章]  [文章引用]  [完整記錄]  [館藏目錄]  至系統瀏覽論文 ( 永不開放)
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| 摘要(中) |
因為半導體製程技術不斷進步，所以製程變動(process variation)造成元件不匹配(mismatch)與導線寄生效應的變動也越趨嚴重。此外，類比電路在設計上的複雜度與時間成本越來越高，因此是否能有可靠的自動化實體佈局將會成為提升整體電路設計效率的關鍵。
在電阻串聯式數位/類比轉換器電路中，串聯電阻陣列用來提供轉換電路連續參考偏壓，藉由電阻串陣列的排列與空間相關性提昇電阻本身在抑制製程變異的能力，也可以有效的降低電路的隨機誤差(random error)，然而，高精確度電阻串及電阻串陣列本身的排列擺置，皆會提高其在實體佈局中繞線上的困難度，導線寄生阻值(interconnect)的不一致性將會引起電路的系統誤差(systematic error)，所以一個好的排列，若未能在實體佈局上自動化實現與平衡寄生效應，終將功虧一簣，故自動化繞線與導線寄生阻值平衡皆不可或缺。
本論文中利用不同金屬層彼此交換作為補償，並且確保每一條電阻間的導線都具有相同的水平與垂直金屬層分配(IC-level channel routing)、相同的VIA區塊、一致的電阻連接形式。接著我們以電阻陣列對角的繞線路徑為基準，並將所有的繞線路徑延伸至等長，且同時開發一個圖型使用者介面(GUI)工具，提供使用者做繞線資訊的設定。佈局完成後再透過calibre軟體來驗證寄生阻值的一致性。
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| 摘要(英) |
Because of the progress of the semiconductor process technology, the process variation will be more and more serious in device mismatch and wire parasitic. In addition, analog circuit design increase time-consuming and complex, so a reliable automation tool will become the key point to enhance the efficiency of the overall circuit design.
For the series resistor array in resistor-string DAC, we can effectively reduce the random error by the permutation and space correlation of resistors. However, the high precision resistor string and resistor array permutation will increase the difficulty of the physical layout, and the inconsistency of the parasitic resistance will cause the circuit system error. Therefore, a good arrangement can not be achieved in the physical layout automation and balance parasitic effects, it will eventually fall short. In other words, the automated routing and interconnect resistance balance has already indispensable.
In this thesis, we get the compensation by exchanging two layer and ensure that each resistor connected wires having the same layer distribution, the same number of VIA block, and the consistent connection form. Then we stretch all routing paths to the same total length. The standard of length is the diagonal routing path. While developing a graphical user interface (GUI) tool, it can provide users to set routing information, bit number, and type clearly. Finally, we balanced the parasitic resistance by calibre.
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| 關鍵字(中) |
★ 任意排列
★ 串聯電阻陣列
★ 自動化佈局
★ 繞線
★ 寄生效應平衡 |
關鍵字(英) |
★ Arbitrarily permutation
★ Series resistor array
★ Automation layout
★ Routing
★ Parasitic effects balance |
| 論文目次 |
中文摘要.....................................................................................................i
Abstract......................................................................................................ii
致謝...........................................................................................................iii
目錄...........................................................................................................iv
圖目錄.......................................................................................................vi
表目錄.......................................................................................................ix
第一章 簡介..............................................................................................1
1.1 問題描述……………………………………………………………………..1
1.2 論文組織……………………………………………………………………..2
第二章 預備知識......................................................................................3
2.1 繞線模型……………………………………………………………………..3
2.2 路徑與金屬層考量…………………………………………………………..3
2.3 電阻及寄生阻值命名………………………………………………………..7
2.4 問題公式化…………………………………………………………………..8
2.5 電阻與內阻長度計算………………………………………………………..9
2.6 不匹配(mismatch)的因素………….…………..……………………………11
第三章 演算法........................................................................................12
3.1 積木繞線描述………………………………….……………………………12
3.2 導線寄生阻值平衡機制………………………………….…………………14
3.3 通道數量安排………………………………………….……………………15
3.4 自動化繞線…………………………………………….……………………18
3.5 資料結構…………………………………………….………………………21
3.6 程式流程……………………………………………….……………………22
第四章 實驗結果與分析........................................................................25
4.1 工作平台及程式語言……………………………….………………………25
4.2 一維Tango排列……………………………………….……………………26
4.3 二維Tango RM擺放………………………………….…….………………27
4.4 實體佈局…………………………………………….………………………28
4.5 結果分析……………………………………………….……………………30
第五章 結論............................................................................................36
參考文獻..................................................................................................37
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| 參考文獻 |
[1] Mark Burns and Gordon W. Roberts, "An Introduction to Mixed-Signal IC Test and Measurement" New York: Oxford, 2001
[2] HY Chen, YW Chang - Electronic Design Automation: Synthesis
[3] "奈米積體電路實體設計", 國立中央大學電機工程研究所上課投影片
[4]游金龍, "BICR:一種用於電阻串陣列的平衡寄生電阻通道繞線法",國立中央大學電機工程學系碩士論文,2010.
[5] "Exact route matching algorithms for analog and mixed signal integrated circuit"
[6]林智勝, "Tango_RM:一個電阻串連續參考值產生之強化排列結構",中華大學電機工程學系碩士論文,2004.
[7]Hiroo Masuda, “Challenge: Variability Characterization and Modeling for 65- to 90-nm Processes,” IEEE Custom Integrated Circuits Conference 2005.
[8]王政傑, "ARBa : An Automatic Resistance-Balanced Routing for Series Resistor Arrays" 中央大學電機工程學系碩士論文,2012.
[9]張宇翔, "Channel Sticks Routing for a Resistor-string Array" 中央大學電機工程學系碩士論文,2013.
[10] Laker User Guide and Tutorial, Nov. 2003.
[11] Laker TCL Reference, Nov. 2003.
[12] http://en.wikipedia.org/wiki/Coefficient_of_variation
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| 指導教授 |
陳竹一(Jwu-E Chen)
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審核日期 |
2015-7-13 |
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