基於K最佳演算法之可結構化天線組態且具軟性輸出的多輸入多輸出偵測器設計

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姓名

王聖弼(Sheng-pi Wang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

基於K最佳演算法之可結構化天線組態且具軟性輸出的多輸入多輸出偵測器設計
(Design of Antenna-Configurable MIMO Detector with Soft-output Based on K-best Algorithm)

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摘要(中)

本論文研究著重在提出改良型K最佳演算法來降低傳統K最佳演算法的複雜度，並加入位元對數相似比值(Bit level Log Likelihood Ratio ,LLR)使效能位元錯誤率提升之軟性解調多輸入多輸出偵測器。此設計可適用於2x2、3x3、4x4、5x5和6x6不同天線組態，並支援64-QAM、16-QAM、QPSK和BPSK不同的調變方法。我們設計改良型K最佳演算法以取代傳統K最佳演算法每一層都需排序，改為兩層排序一次減少排序次數。同時提出編碼式列舉法(Code-Book Enumeration, CBE)來避免硬體使用除法並預測可能的展開子點，排序部分則設計平行切割合併法(Parallel-Slice Merge Algorithm, PSMA)和平行氣泡切割排序法(Parallel Bubble-Slice Sort, PBSS)來減少運算週期，加快硬體運算速度。除此之外，提出了一個有效率產生多組額外路徑的辦法，使效能有效提升。在硬體實現上，我們採用了管線式架構來設計以提高硬體操作頻率增加產出量，並利用折疊(Folding)架構有效利用硬體面積。在複雜度比較上，與傳統K最佳演算法比能減少最多46%的拜訪點數與最多62%乘法運算次數，有效降低演算法複雜度。最後硬體實現方面使用SMIMS VeriEnterprise Xilinx FPGA驗證電路功能。

摘要(英)

In this thesis, we proposed modified K-best algorithm (MKB) to saving complexity from conventional K-best algorithm, and introduce the Bit level Log Likelihood Ratio (LLR) to complete MIMO detector with soft-output. It can support multiple antenna types (6×6, 5×5, 4×4, 3×3, 2×2), and various modulation schemes (64-QAM, 16-QAM, QPSK, BPSK) in this design. We replaced conventional K-best algorithm which sorting every layer with modified K-best algorithm which sorting two layers once to reduce half times of sorting. We also proposed Code-Book Enumeration (CBE) to avoid using divider and predict probable expand nodes. In order to reduce operation cycles, we design Parallel-Slice Merge Algorithm (PSMA) and Parallel Bubble-Slice Sort (PBSS) to improve hardware throughput. In addition, we proposed an algorithm that uses the information of K-Best signals in each layer of tree search and generate additional tree search paths to further enhance BER performance of the soft-output MIMO detector. We used pipeline architecture to increase operation frequency and use folding architecture to let hardware using efficiency in hardware implementation. From complexity comparison with conventional K-best algorithm, the proposed algorithm reduces visited node up to 46% and reduces the number of multiplications up to 62%. Finally, the proposed configurable MIMO detector with soft-output is verified by the SIMIS VeriEnterprise Xilinx FPGA development board.

關鍵字(中)

★ 多輸入多輸出偵測器
★ K最佳演算法
★ 軟性輸出

關鍵字(英)

★ MIMO detector
★ K-best
★ soft-output

論文目次

摘要 i
Abstract ii
致謝 iii
目錄 iv
圖目錄 vi
表目錄 ix
第一章緒論 1
1.1 背景 1
1.2 研究動機 2
1.3 論文架構 3
第二章多輸入多輸出系統 4
2.1 MIMO系統 4
2.1.1 系統架構 4
2.1.2 通道容量 5
2.2 空間多工 6
2.3 空間多工解碼演算法 7
2.3.1 線性解碼 7
2.3.2 非線性解碼 8
2.4 軟性解調輸出(Soft output) 10
2.4.1 比較硬性解調與軟性解調差異 10
2.4.2 比較硬性解調與軟性解調有無通道解碼器差異 13
2.4.3 非線性解碼MIMO偵測器的軟性解調輸出[8] 15
第三章軟性解調MIMO偵測器演算法 17
3.1 非線性軟性解調輸出之偵測器簡化 18
3.1.1 列表產生器 20
3.2 實數訊號模型 21
3.3 傳統K最佳演算法 23
3.4 改良型K最佳演算法 24
3.4.1 提出之編碼式列舉法 27
3.4.2 排序法 31
3.5 天線組態可配置架構 36
3.6 複雜度與效能比較 40
第四章軟性解調輸出偵測器架構設計 42
4.1 輔助電路 43
4.1.1 位移乘法器 (Shift multiplier) 44
4.2 列表產生器 45
4.2.1 前端解碼電路設計 46
4.2.2 後端解碼電路設計 51
4.2.3 額外路徑產生器電路設計 54
4.3 軟性值產生器 55
第五章硬體實現 57
5.1 設計流程 57
5.2 定點數模擬分析 58
5.3 FPGA驗證與Design Compiler合成 59
5.4 與其他文獻比較 61
第六章結論 63
參考文獻 64

參考文獻

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指導教授

薛木添

審核日期

2015-7-21

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