博碩士論文 102521097 詳細資訊




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姓名 林厚安(Hou-An Lin)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 應用傳輸線型變壓器與自適應偏壓於C/X頻段之寬頻互補式金氧半導體功率放大器研製
(Wideband CMOS Power Amplifiers Using Transmission-Line Transformer and Adaptive Bias for C/X-band Applications)
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摘要(中) 本論文利用tsmcTM 0.18-µm製程設計功率放大器,在設計上以操作於C/X頻段功率放大器為主要目標。電路採用傳統磁耦合變壓器和傳輸線型變壓器達到寬頻與低損耗的阻抗匹配,利用交錯耦合單向化電容於疊接電路來抑制共源極組態中由於閘-汲寄生電容(Cgd)所產生的米勒效應(Miller Effects),進而提高電路的穩定性以及傳輸增益(S21),並使用自適應偏壓電路來改善電路的線性度以及功率回退時的功率附加效率(PAE),達成高增益和高線性度之寬頻功率放大器。
各電路特性量測如下 : 應用變壓器與自適應偏壓電路於C/X頻段之寬頻功率放大器,傳輸增益(S21)為18 dB,飽和輸出功率為21 dBm,1-dB增益壓縮點輸出功率為14.6 dBm,功率附加增益為6.33%,3-dB頻寬為1.55 GHz (5.55-7.1 GHz),比例頻寬為24.5%;應用傳輸線型變壓器與自適應偏壓之單向化功率放大器,傳輸增益(S21)為28.27 dB,飽和輸出功率為22.95 dBm,最佳功率附加增益為23.94%,1-dB增益壓縮點輸出功率為21.77 dBm,1-dB增益壓縮點的功率附加增益最高可達21.31%,小訊號增益之3-dB頻寬為6.6 GHz (5.1-11.7 GHz),比例頻寬為78.57%,飽和輸出功率之1-dB頻寬為6 GHz (5-11 GHz)。 
摘要(英) Both C-band and X-band fully integrated silicon-based power amplifiers (PA) are designed in this thesis, which are fabricated in tsmcTM 0.18-µm CMOS Process. A CMOS PA with wideband, high gain and high linearity adopted magnetically coupled transformer and differential Guanella-type transmission-line transformers (DTLTs) is designed to achieve broadband and low loss matching. The capacitive neutralization technique is adopted to mitigate the Miller effects to improve power gain and enhance stability. The linearity and power added efficiency (PAE) at back-off region are enhanced by adaptive bias technique.
The measurement results of the first PA shows a power gain of 18 dB, a saturated output power of 21 dBm, an output 1-dB gain compression point of 14.6 dBm and the maximum power added efficiency of 6.33%. The 3-dB bandwidth is from 5.55 to 7.1 GHz. The chip size is 1.57 mm2. The second PA achieves a power gain of 28.27 dB, a saturated output power of 22.95 dBm, a maximum power added efficiency of 23.94%, an output 1-dB gain compression point of 21.77 dBm with power added efficiency of 21.31%. The 3-dB bandwidth is from 5.1 to 11.7 GHz. The 3-dB bandwidth of saturation power is from 5 to 11 GHz. The chip area is 1.87 mm2
關鍵字(中) ★ 功率放大器 關鍵字(英) ★ Power Amplifier
論文目次 目錄
摘要 i
Abstract ii
誌謝 iii
目錄 v
圖目錄 vii
表目錄 x
第一章 緒論 1
1-1 研究動機 1
1-2 研究成果 2
1-3 章節簡介 2
第二章 應用傳輸線型變壓器與自適應偏壓之單向化功率放大器 3
2-1 磁耦合變壓器與傳輸線型變壓器 3
2-1-1 磁耦合變壓器簡介 3
2-1-2 傳輸線型變壓器簡介 6
2-2 自適應偏壓電路 9
2-2-1 電路簡介 9
2-2-2 線性度與效率之改善 9
2-3 單向化電路與中和化電路 12
2-3-1 電路簡介 12
2-3-2 增益與穩定度之改善 15
2-4 研究現況 18
2-5 應用變壓器與自適應偏壓於C/X頻帶之寬頻功率放大器 20
2-5-1 應用變壓器與自適應偏壓於C/X頻帶之寬頻功率放大器設計 20
2-5-2 電路模擬與量測結果 26
2-5-3 結果比較與討論 33
2-6 應用傳輸線型變壓器與自適應偏壓之寬頻單向化功率放大器 37
2-6-1 應用傳輸線型變壓器與自適應偏壓之寬頻單向化功率放大器設計 37
2-6-2 模擬與量測結果 46
2-6-3 結果比較與討論 57
第三章 結論 61
3-1 結論 61
3-2 未來方向 62
參考文獻 63
參考文獻 [1] J. R. Long, “Monolithic transformers for silicon RFIC design,” IEEE J. Solid-State Circuits, vol. 35, no. 9, pp. 1368-1382, Sep. 2000.
[2] I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Distributed active transformer–a new power-combining and impedance-transformation technique,“ IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 316-331, Jan. 2002.
[3] P. Haldi, D. Chowdhury, P. Reynaert, G. Liu, and A. M. Niknejad, “A 5.8 GHz 1 V linear power amplifier using a novel on-chip transformer power combiner in standard 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1054-1063, May 2008.
[4] K. H. An, O. Lee, H. Kim, D. H. Lee, J. Han, K. S. Yang, Y. Kim, J. J. Chang, W. Woo, C.-H. Lee, H. Kim, and J. Laskar, “Power-combining transformer techniques for fully-integrated CMOS power amplifiers,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1064-1075, May 2008.
[5] J. Kim, W. Kim, H. Jeon, Y. Y. Huang, Y. Yoon, H. Kim, C. H. Lee, K.T. Kornegay, “A fully-integrated high-power linear CMOS power amplifier with a parallel-series combining transformer, ” IEEE J. Solid-State Circuits, of , vol.47, no.3, pp.599-614, Mar. 2012
[6] C. L. Ruthroff, “Some broadband transformers,” Proc. IRE, vol. 47, pp. 1337-1342, Aug. 1959.
[7] G. Guanella, “New method of impedance matching in radio-frequency circuits,” Brown-Boveri Rev., vol. 31, pp. 327-329, Sep. 1944.
[8] H.-K. Chiou, H.-Y. Chung, “2.5-7 GHz single balanced mixer with integrated ruthroff-type balun in 0.18 μm CMOS technology, ” Electronics Letters , vol.49, no.7, pp.474-475, Mar. 28 2013
[9] B. Kim, J. Moon, I. Kim, “Efficiently amplified, ” IEEE Microwave Magazine, vol.11, no.5, pp.87-100, Aug. 2010
[10] S. Jin, B. Park, K. Moon, M. Kwon, B. Kim, “Linearization of CMOS cascode power amplifiers through adaptive bias control, ” IEEE Trans. Microw. Theory Tech., vol.61, no.12, pp.4534-4543, Dec. 2013
[11] C. C. Cheng, “Neutralization and unilateralization, ” Circuit Theory, IRE Transactions on, vol.2, no.2, pp.138-145, Jun. 1955
[12] B.-H. Ku, S.-H. Baek, S. Hong, “A wideband transformer-coupled CMOS power amplifier for X-band multifunction chips,” IEEE Trans. Microw. Theory Tech., vol.59, no.6, pp.1599-1609, Jun. 2011
[13] H. Wang, C. Sideris, and A. Hajimiri, “A CMOS broadband power amplifier with a transformer-based high-order output matching network,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2709-2722, Dec. 2010.
[14] P.-S. Chi, Z.-M. Tsai, J.-L. Kuo, K.-Y. Lin, and H. Wang, “An X-band, 23.8-dBm fully integrated power amplifier with 25.8% PAE in 0.18-μm CMOS technology,” 40th European Microwave Conference (EuMC), Paris, France, vol. 28-30, pp.1678-1681, Sep. 2010
[15] P.-C. Huang, K.-Y. Lin and H. Wang, “A 4–17 GHz Darlington cascode broadband medium power amplifier in 0.18 μm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 1, pp. 43–45, Jan. 2010.
[16] C. Lu, A.-V.H. Pham, M. Shaw, C. Saint, ”Linearization of CMOS broadband power amplifiers through combined multigated transistors and capacitance compensation,” IEEE Trans. Microw. Theory Tech., vol.55, no.11, pp.2320-2328, Nov. 2007
[17] T. Yao, M. Q. Gordon, K. K. W. Tang, K. H. K. Yau, M.-T. Yang, P. Schvan, and S. P. Voinigescu, “Algorithmic design of CMOS LNAs and PAs for 60-GHz radio,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1044-1057, May 2007.
[18] C.-H. Lin and H.-Y. Chang, “A broadband injection-locking class-E power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 10, pp. 3232-3242, Oct. 2012
[19] C.-W. Kuo; H.-K. Chiou; H.-Y. Chung, “An 18 to 33 GHz fully-integrated Darlington power amplifier with Guanella-type transmission-line transformers in 0.18 µm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol.23, no.12, pp.668-670, Dec. 2013
[20] Y. Yin, X. Yu, Z. Wang, B. Chi, “An efficiency-enhanced stacked 2.4-GHz CMOS power amplifier with mode switching scheme for WLAN applications,” IEEE Trans. Microw. Theory Tech., vol. 63, no. 2, pp. 672-682, Jan. 2015.
[21] E. Kaymahsut, P. Reynaert, “Transformer-based uneven Doherty power amplifier in 90 nm CMOS for WLAN applications,” IEEE J. Solid-State Circuits, vol. 47, no. 7, pp. 1659-1671, Jul 2012.
[22] T.-M. Chen, Y.-M. Chiu, C.-C. Wang, K.-U. Chan, Y.-H. Lin, M.-C. Huang, C.-H. Lu, W.-S. Wang, C.-S. Hu, C.-C. Lee, C. Cheng, J.-Z. Huang, B.-I Chang, S.-C. Yen, “A low-power fullband 802.11a/b/g WLAN transceiver with on-chip PA” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 983-991, May 2007.
[23] W. Bakalski, A. Vasylyev, W. Simburger, M. Kall, A. Schmid, K. Kitlinski, “ A 4.8-6 GHz IEEE 802.11a WLAN SiGe-bipolar power amplifier with on-chip output matching,” European Microwave Conference (EuMC), vol.28–30, pp.1678–1681. Oct. 2005
[24] F. Wang, D.F. Lie, D.Y. Asbeck, P.M. Larson, L.E. “A monolithic high-efficiency 2.4-GHz 20-dBm SiGe BiCMOS envelope-tracking OFDM power amplifier” IEEE J. Solid-State Circuits, vol. 42, no. 6, pp. 1271-1281, Jun. 2007.
[25] C.-H. Lin, Y.-K. Su, Y.-Z. Juang, C.-F. Chiu, S.-J. Chen, J. F., C.-H. Tu, “The optimized geometry of the SiGe HBT power cell for 802.11a WLAN applications,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 1, pp. 49-51, Jan. 2007.
[26] IEEE Std 802.11a-1999, IEEE Standard 802.11, 2013.
[27] B. Razavi, Design of analog CMOS integrated circuits, McGraw-Hill, 2001.
[28] 廖顯原,「應用於矽基功率放大器之傳輸線變壓器與穿透矽通孔之研究」,國立中央大學,博士論文,民國100年。
[29] 郭晉瑋,「應用傳輸線型變壓器於X/K–Ka/V頻段全積體整合之寬頻互補式金氧半導體功率放大器研製」,國立中央大學,碩士論文,民國102年。
[30] 陳柏勳,「應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製」,國立中央大學,碩士論文,民國103年。
指導教授 邱煥凱(Hwann-Kaeo Chiou) 審核日期 2015-7-28
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