針對電源完整性應用之帶拒式電源分佈網路合成技術開發

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吳仕先(Shih-Hsien Wu) 查詢紙本館藏

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電機工程學系

論文名稱

針對電源完整性應用之帶拒式電源分佈網路合成技術開發
(Synthesis of Bandstop Power Distribution Network for Power Integrity Applications)

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摘要(中)

隨著半導體科技技術的不斷發展，混合信號系統及模組的設計困難度也隨之提高。在面對異質晶片元件的模組整合設計上所需考量的是將不同功能晶片整合在同一系統或模組時必需解決的信號干擾問題，諸如將高速數位處理器、記憶體、射頻電路元件、微機電系統及光電元件等異質功能晶片都整合在同一模組內時，晶片元件之間信號干擾問題將急劇的惡化整個系統或模組的功能。為了將電源提供給同一模組內的元件，在PCB內通常以兩整層導體層作為電源層與接地層，使模組內的元件都能自PCB內的電源層及接地層得到足夠的電源供給。但在獲得電源的同時，這些元件在信號切換過程中所產生的雜訊也會隨著PCB內的電源層與接地層傳遞到其他同一模組的元件上，並造成受干擾元件功能失效的現象。
本論文針對上述電源雜訊問題，提出帶拒式電源分佈網路及其合成技術。於論文中提出兩種帶拒式結構應用於帶拒式電源分佈網路的合成技術，此兩種帶拒式結構分別為共振孔(Resonant Via)帶拒結構及四分之一波長傳輸線帶拒結構。以共振孔帶拒結構所開發出的合成方法可依據帶拒頻寬及帶拒隔離準位的規格要求，決定共振孔帶拒結構的幾何尺寸，加上共振孔帶拒結構具有完整的電源及接地層，因此對於需要嚴謹考量參考電源或接地層的高速信號傳遞需求將相當有助益。四分之一波長傳輸線帶拒結構的使用將可減少對PCB內導體層的要求，因其可實現於電源層或接地層，因此可直接套用在現有電源分佈網路上且只需占有一部分的電源層或接地層空間。藉由四分之一波長傳輸線帶拒結構的帶拒特性及所開發的合成技術，透過實際設計範例的驗證，能在70 dB的雜訊隔離準位下達到1 GHz到40 GHz的超寬頻帶拒頻寬，對於工作於不同頻率的異質晶片元件的整合設計來說，此超寬頻帶拒頻寬的特性將非常具有應用價值。
對於未來電子模組普遍存在的諸如信號的感測、計算及通訊傳遞的功能整合需求，本論文提出的帶拒式電源分佈網路及其合成技術可滿足其模組內電源分佈網路的需要。

摘要(英)

With the fast evolution in semiconductor technology, mixed-signal system design is becoming a complex task that involves the heterogeneous integration of functions such as high-speed digital processing, memory, radio frequency circuits, sensors, micro-electro-mechanical systems, and optoelectronic devices. Noise isolation between different devices is thus a key issue in mixed-signal system designs. To deliver dc power to the core circuit, solid conductive layers in multilayered printed circuit boards (PCB) and package substrates are often used as the power delivery network (PDN), while the noise can easily propagate through such a parallel-plate waveguide like PDN.
A bandstop PDN circuit model along with the synthesis method and design equations are proposed in this work. Two bandstop structure, i.e., the resonant via structure and λ/4 line-based structure, are used to realize the proposed bandstop PDN circuit model. With the proposed equivalent-circuit model, design equations and design charts, the geometrical structure of them can be quickly designed according to the desired stopband bandwidth and isolation level. The synthesized bandstop PDN structures have been implemented and verified with circuit simulation, EM simulation, and measurement. A extremely wide stopband from 1.33 GHz to more than 40 GHz with 70 dB isolation is achieved.
With the integration demand of sensing, computing, and communication capabilities in a tightly integrated module, we believe that the proposed bandstop PDN are suitable for offering a low noise PDN in the mixed-signal systems, power integrity and good performance can thus be achieved.

關鍵字(中)

★ 帶止式
★ 電源分布網路
★ 電源完整性

關鍵字(英)

★ Bandstop
★ PDN
★ Power Integrity

論文目次

論文摘要 I
Abstract II
Contents III
List of Figures V
List of Tables XI
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Literature Survey 2
1.3 Contributions 5
1.4 Organization 6
Chapter 2 Bandstop PDN Design Theory 7
2.1 PDN Circuit Model 7
2.2 Design Theory 10
Chapter 3 Bandstop PDN Based on Resonant Vias 16
3.1 Circuit Analysis and Synthesis Procedure 16
3.2 Design Examples 29
3.2.1 Single Stopband Design 29
3.2.2 Dual Stopband Design 39
3.3 Summary 56
Chapter 4 Quarter-Wavelength Line-Based Bandstop PDN 59
4.1 Circuit Analysis and Synthesis Procedure 59
4.2 Design Examples 68
4.3 Summary 87
Chapter 5 Conclusions 89
5.1 Brief Conclusion 89
5.2 Future Work 91
Reference 94
Publication List

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指導教授

林祐生

審核日期

2016-1-27

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