四合一正三角形網格開發及在二維半導體元件模擬應用

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姓名

李心媛(Shin-Yuan Li) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

四合一正三角形網格開發及在二維半導體元件模擬應用
(Development of four-in-one regular triangle element and its applications to 2D semiconductor device simulation)

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摘要(中)

在模擬元件結構時,若遇到特殊型元件,由於矩形網格較規則性,因此受限較大,使得在圓弧設計的元件以及較不規則性的元件模擬其易造成極大的誤差,因此在本論文中,我們開發正三角形網格,進而開發出四合一正三角形網格,我們運用網格來滿足任意形狀的二維半導體元件模擬。為了實現網格的準確性,我們以簡單電阻及特殊型電阻和PN二極體進行驗證,與理論值及估算理論值做比較, 驗證無誤後,最後再利用我們的網格探討PN二極體內的電流擁擠效應。

摘要(英)

The rectangle mesh is restricted for the simulation of 2D semiconductor device with special structure. Therefore, the rectangle mesh can introduce serious errors into the simulation in irregular region device and arc-shaped device. In this thesis, we develop regular triangle mesh and four-in-one regular triangle mesh. It can be applied to fit any shapes of semiconductor device in the 2D simulation. In order to verify the accuracy of this module, we simulate simple resistor and particular resistor for comparison to the theoretical value. Finally, we apply the four-in-one module to discuss current crowding of the PN diode.

關鍵字(中)

★ 模擬
★ 正三角形

關鍵字(英)

★ simulation
★ rectangle

論文目次

摘要..................................................iii
圖目錄.................................................vi
表目錄...............................................viii
第1章簡介...............................................1
第2章矩形網格與四合一正三角形網格建立及分析................3
2.1 二維等效電路矩形網格建立..............................3
2.2 二維正三角形網格開發.................................6
2.3 四合一正三角網格與矩形網格之間的分析.................12
第3章矩形網格與四合一正三角形網格應用探討與驗證..........16
3.1 四合一網格在均勻電阻的應用..........................16
3.2 四合一網格在菱形區域Oxide電阻的應用.................18
3.2.1 四合一正三角形在菱形Oxide區塊應用.................18
3.2.2 探討菱形區域Oxide內部電阻值.......................20
3.2.3 矩形在菱形Oxide區塊應用的缺失.....................26
3.3 基本PN二極體與圓弧接面之二極體驗證...................28
3.3.1 基本PN二極體應用驗證..............................28
3.3.2 應用於圓弧形PN二極體接面的驗證.....................31
第4章四合一網格與元件模擬之應用.........................34
4.1 網格應用於PN二極體特性..............................34
4.2 網格模擬探討內部電場及電流密度.......................36
4.3 驗證內部電場及電流密度..............................39
第5章結論.............................................43
參考文獻.............................................. 44

參考文獻

[1]J. D. Plummer, M. D. Deal and P. B. Griffin, “Silicon VLSI Technology: Fundame-ntals, Practice and Modeling, ’’ NJ: Prentice Hall, 2000.
[2]J. A. Hoerni, “Method of Manufacturing Semiconductor Devices," U. S. Patent 3 025 589, March 20, 1962.
[3]D. K. Cheng, Field and wave electromagnetics, 2nd ed.: Addison-Wesley Publishing Company , Inc., 1989.
[4]D. L. Scharfetter, H.K. Gummel, “Large-Siginal Analysis of a Silicon Read Diode Oscillator,” IEEE Trans.Electron Device, vol 16,Jan 1969.
[5]J. He, et al., “Analytical solution of subthreshold channel potential of gate underlap cylindrical gate-all-around MOSFET,’’ Solid-State Electronics, vol. 54, pp. 806-808, Aug 2010.
[6]Q. Wang, X. Tao, L. Yang, and Y. Gu, Current crowding in two-dimensional black-phosphorus field-effect transistors, Appl. Phys. Lett. 108, 103109,2016.
[7]S. S. Kuo, Computer applications of numerical methods, Additions-Wesley Pub. Co., 1972.
[8]M. Shur, “Introduction to Electronic Devices,” Chapter 3, John Wiley & SonsInc.,1996.
[9]S. Selberherr, “Analysis and Simulation of Semiconductor Devices,”Springer-Verlag, New York, pp. 111-112, 1984.
[10]H. C. Casey, jr., Devices for Integrated Circuits, Silicon and III-V Compound Semiconductors, Chapter 8, John Wiley & Sons, Inc., 1999.
[11]S. M. Sze, “Semiconductor Device：Physics and Technology” Edition, Chapter 6, Wiley & Sons Inc, 2002.
[12]R.E. Bank, W.M. Coughran, Jr., W. Fichtner, E.H. Grosse, D.J. Rose, and R.K. Smith, "Transient Simulation of Silicon Devices and Circuits." IEEE Trans. CAD, vol. CAD-4, pp. 436-451, 1985.
[13]C.T. Sah, "New Integral Representations of Circuit Models and Elements for the Circuit Technique for Semiconductor Device Analysis." Solid-State Electron, vol.30, no.12, pp. 1277-1281, 1987.
[14]E.R.Hsieh and SteveS.Chung, “A New Type of Inverter with Junctionless (J-Less) Transistors,” Silicon Nanoelectronics Workshop (SNW) , pp.1-2, 2010.
[15]F. Yamamoto and S. Takahashi, “Vectorized LU decomposition algorithms for large-scale circuit simulation.” IEEE Trans. Computer-Aided Design, vol. CAD-4, no.3, pp. 232-238, July 1985.
[16]J. F. Dai, C. C. Chang, J. W. Lee, S. J. Li, and Y. T. Tsai, “Simplified equivalent-circuit modeling for decoupled and partial decoupled methods in semiconductor device simulation, “International Journal of Numerical modeling: Electronic Networks, Devices, and Fields, vol. 17, pp. 421-432, 2004.
[17]M. J. Zeng, ”Development of Triangular element and its applications to arbitrary 2D Semiconductor device,” M. S. Thesis, Institute of EE, National Central University, Taiwan, R.O.C, 2014.
[18]D. A. Neamen, Semiconductor physics and devices: Basic Principles, 4th ed., McGraw-Hill, Chapter 10, 2012.
[19]S. Selberherr, Analysis and Simulation of Semiconductor Devices. New York: Springer, 1984.
[20]C.-C. Chang, J.-F.Dai,and Y.-T. Tsai,”Verification of 1D BJT numerical simulation and its application to mixed-level device and circuit simulation,” Int. J. of Numerical Modelling:Electronic Networks. Devices and Fields, pp. 81-94, 2003.

指導教授

蔡曜聰(Yao-Tsung Tsai)

審核日期

2016-6-28

推文