利用電漿處理之氧化鉿/氧化鋁/砷化銦金氧半電容界面缺陷研究

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：38

、訪客IP：3.131.110.169

姓名

何恭榜(Gong-Bang He) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

利用電漿處理之氧化鉿/氧化鋁/砷化銦金氧半電容界面缺陷研究
(Investigation on the Interfacial Traps of Plasma-Treated HfO2/Al2O3/InAs MOS Capacitors)

相關論文

★ 磷化銦異質接面雙極性電晶體元件製作與特性分析	★ 氮化鎵藍紫光雷射二極體之製作與特性分析
★ 氮化銦鎵發光二極體之研製	★ 氮化銦鎵藍紫光發光二極體的載子傳輸行為之研究
★ 次微米磷化銦/砷化銦鎵異質接面雙極性電晶體自我對準基極平台開發	★ 以 I-Line 光學微影法製作次微米氮化鎵高電子遷移率電晶體之研究
★ 矽基氮化鎵高電子遷移率電晶體通道層與緩衝層之成長與材料特性分析	★ 磊晶成長氮化鎵高電子遷移率電晶體結構於矽基板過程晶圓翹曲之研析
★ 氮化鎵/氮化銦鎵多層量子井藍光二極體之研製及其光電特性之研究	★ 砷化銦量子點異質結構與雷射
★ 氮化鋁鎵銦藍紫光雷射二極體研製與特性分析	★ p型披覆層對量子井藍色發光二極體發光機制之影響
★ 磷化銦鎵/砷化鎵異質接面雙極性電晶體鈍化層穩定性與高頻特性之研究	★ 氮化鋁中間層對氮化鋁鎵/氮化鎵異質接面場效電晶體之影響
★ 不同濃度矽摻雜之氮化鋁銦鎵位障層對紫外光發光二極體發光機制之影響	★ 二元與四元位障層應用於氮化銦鎵綠光二極體之光性分析

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

隨著半導體科技日益發展，許多新穎材料正在持續地突破發展，期待能取代傳統矽材料成為次世代的半導體材料。其中，三五族化合物半導體是現今最受期待的研究主題之一，三五族材料如砷化銦擁有窄能隙及高電子遷移率之特性，使之能在低操作電壓環境下提供高導通電流，是相當適合製作未來高效能低功耗互補式電晶體之材料。然而，相較於擁有良好界面品質的矽材料，三五族化合物半導體與高介電值氧化層之間存在大量的界面缺陷將造成嚴重的載子表面散射，使元件之導通電流大幅下降，同時，閘極控制能力亦受缺陷影響而無法順利操控開關，將導致過大的功率損耗。因此，界面缺陷的清除是目前砷化銦元件發展的首要工作之一。
本論文研究首先以氫氣與氮氣電漿於沉積氧化層前進行表面處理，並製作成氧化鉿(3 nm)/氧化鋁(2 nm)/砷化銦金氧半電容，藉由電容-電壓特性探討電漿表面處理後之缺陷密度及缺陷能階分佈狀況。實驗結果顯示，氫氣電漿雖與表面氧原子間的化學反應能有效將原生氧化層之缺陷消除，但於ALD腔體之高溫環境下，將使得反應過於激烈而造成表面出現銦聚集現象，使元件發生嚴重的漏電問題；而經過氮氣電漿表面處理後，以Terman method之缺陷計算方式下，導電帶附近及能隙中間區之缺陷密度可有效地降低至2.9×1013 eV-1cm-2及2.5×1012 cm-2eV-1，並且在氧化層/半導體界面形成氮化鋁層，使閘極氧化層之絕緣性提升且提供額外的防護層，讓氧半界面在後續的製程中避免受到氧化之影響。
為了得到更低的界面缺陷密度，吾人亦於非臨場環境下結合氫氣及氮氣電漿之缺陷清理特性，發展出先以氫氣電漿清理表面氧化物和砷二聚體，再利用氮氣電漿將界面氮化之處理方式，使導電帶附近之缺陷密度再減少至2.3×1013 eV-1cm-2，並且在能隙內得到最小的缺陷密度約7.1×1011 cm-2eV-1。此研究顯示，將氫氣及氮氣電漿搭配進行界面清理後，能夠有效降低界面缺陷密度和解決費米能階釘扎效應，且在考慮氧化層與界面缺陷的情況下，吾人以氫氣搭配氮氣電漿處理之界面特性亦為當前領先的研究成果之一，其界面缺陷改善程度更優於文獻中使用化學性蝕刻之處理方式約兩個數量級，顯示此技術對於未來實現砷化銦電晶體將有相當大的助益。

摘要(英)

There have been various semiconductor materials proposed so far to overcome the physical limitation of current Si-based transistor technology. Among these proposals, III-V materials are considered very promising candidates in the future. Since InAs has the advantages of having very high electron mobility for high speed operation, and narrow bandgap for low voltage operation, it attracts great attention for application in future high performance, low power consumption complementary metal-oxide-semiconductor (CMOS). However, the lack of high quality high-k/InAs interface, i.e. there exists significant amount of interface traps, which result in severe carrier scattering and poor channel modulation, has hindered the deployment of InAs metal-oxide-semiconductor field-effect-transistors (MOSFETs).
To overcome the interface traps issue, a hydrogen and nitrogen plasma surface cleaning method is proposed in this work. The effects of this cleaning method on the density of interface traps (Dit) and the distribution of these traps in the energy gap are investigated by characterizing a series of HfO2/Al2O3/InAs MOS-capacitors that are subject to different plasma cleaning processes. It is found that hydrogen plasma is too aggressive and could cause In droplets on InAs surface during the device processing, while nitrogen plasma could preserve the surface and successfully reduce the traps density to 2.9× 1013 cm-2eV-1 and 2.5×1012 cm-2eV-1 near the conduction band and midgap, respectively. The presence of an AlN nitridaton layer at the interface is believed to play a role to avoid re-oxidation in the subsequent processes.
In order to achieve the lowest Dit, InAs MOSFETs subject to both hydrogen and nitrogen plasma treatments are fabricated in an ex-situ environment. As a result, a low Dit of 8.3×1012 cm-2eV-1 near the valence band, 2.3×1013 cm-2eV-1 near the conduction band, and 7.1×1011 cm-2eV-1 inside the bandgap has been archieved, respectively.

關鍵字(中)

★ 三五族化合物半導體
★ 砷化銦金氧半電容
★ 氧化層/半導體界面分析

關鍵字(英)

★ III-V compound semiconductor
★ InAs MOSCAPs
★ Interfacial analysis

論文目次

摘要 i
Abstract iii
誌謝 iv
目錄 v
圖目錄 viii
表目錄 xii
第一章導論 1
1.1 前言 1
1.2 研究動機 2
1.3 論文架構 7
第二章實驗設備與分析方法 8
2.1 前言 8
2.2 實驗設備 9
2.2.1 原子層沉積系統 9
2.2.2 原子力顯微鏡 11
2.2.3 X-射線光電子能譜系統 14
2.3 介電層/半導體界面分析方法與原理 15
2.3.1 氧化層/半導體界面缺陷種類介紹 20
2.3.2 界面缺陷密度計算及分佈 23
▓ 電導法(Conductance Method) 23
▓ 高頻法(Terman Method) 26
第三章氫氣與氮氣電漿處理對氧化層/砷化銦界面缺陷之研究 29
3.1 前言 29
3.2 試片製備 30
3.3 電漿處理後氧化鉿/氧化鋁/砷化銦表面形貌分析 34
3.4 氧化鉿/氧化鋁/砷化銦金氧半結構之電容-電壓特性分析 38
3.5 界面缺陷密度計算與能帶分佈 42
3.6 氧化層/半導體界面化合物探討 49
3.7 結論 55
第四章非臨場氫氣及氮氣電漿表面處理對氧化鉿/氧化鋁/砷化銦金氧半結構特性之研究 56
4.1 前言 56
4.2 試片製備 58
4.3 非臨場氫氣/氮氣電漿表面處理對金氧半結構電容-電壓之影響 60
4.4 界面缺陷密度計算及能帶分佈 63
4.5 氧化層/半導體界面化合物探討 66
4.6 結論 70
第五章總結 71
參考文獻 73

參考文獻

[1] K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, et al., "A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging," presented at the IEEE International Electron Devices Meeting (IEDM), 2007.
[2] M. Bohr, "The evolution of scaling from the homogeneous era to the heterogeneous era," presented at the Electron Devices Meeting (IEDM), 2011.
[3] R. Bijesh, H. Liu, H. Madan, D. Mohata, W. Li, N. V. Nguyen, et al., "Demonstration of In0.9Ga0.1As/GaAs0.18Sb0.82 near broken-gap tunnel FET with ION=740mA/mm, GM=70 mS/mm and gigahertz switching performance at VDS=0.5V," presented at the IEEE International Electron Devices Meeting (IEDM), 2013.
[4] A. J. Strojwas, "Is the bulk vs. SOI battle over?," presented at the VLSI Technology, Systems, and Applications (VLSI-TSA), 2013.
[5] T. I. Tsai, T. S. Chao, C. J. Su, H. C. Lin, T. Y. Huang, H. C. Lin, et al., "Low temperature polycrystalline Si nanowire devices with gate-all-around Al2O3/TiN structure using an implant-free technique," presented at the Nanoelectronics Conference (INEC), 2011.
[6] J. A. del Alamo, "Nanometre-scale electronics with III-V compound semiconductors," Nature, vol. 479, pp. 317-323, Nov 2011.
[7] D. K. Schroder, "Semiconductor Material and Device Characterization," ed: Wiley-IEEE Press, 2006.
[8] G. D. Wilk, R. M. Wallace, and J. M. Anthony, "High-κ gate dielectrics: Current status and materials properties considerations," Journal of Applied Physics, vol. 89, pp. 5243-5275, Jan 2001.
[9] H. Zhao, J. H. Yum, Y. T. Chen, and J. C. Lee, "In0.53Ga0.47As n-metal-oxide-semiconductor field effect transistors with atomic layer deposited Al2O3, HfO2, and LaAlO3 gate dielectrics," Journal of Vacuum Science & Technology B, vol. 27, pp. 2024-2027, Jul 2009.
[10] H. Y. Lin, S. L. Wu, C. C. Cheng, C. H. Ko, C. H. Wann, Y. R. Lin, et al., "Influences of surface reconstruction on the atomic-layer-deposited HfO2/Al2O3/n-InAs metal-oxide-semiconductor capacitors," Applied Physics Letters, vol. 98, p. 123509, Mar 2011.
[11] M. Caymax, G. Brammertz, A. Delabie, S. Sioncke, D. Lin, M. Scarrozza, et al., "Interfaces of high-k dielectrics on GaAs: Their common features and the relationship with Fermi level pinning," Microelectronic Engineering, vol. 86, pp. 1529-1535, Mar 2009.
[12] V. Chobpattana, J. Son, J. J. M. Law, R. Engel-Herbert, C. Y. Huang, and S. Stemmer, "Nitrogen-passivated dielectric/InGaAs interfaces with sub-nm equivalent oxide thickness and low interface trap densities," Applied Physics Letters, vol. 102, p. 022907, Jan 2013.
[13] D. C. Andrew, J. M. William, J. T. Brian, J. M. L. Jeremy, and J. W. R. Mark, "Al2O3 growth on (100) In0.53Ga0.47As initiated by cyclic trimethylaluminum and hydrogen plasma exposures," Applied Physics Express, vol. 4, p. 091102, Aug 2011.
[14] C. H. Wang, S. W. Wang, G. Doornbos, G. Astromskas, K. Bhuwalka, R. Contreras-Guerrero, et al., "InAs hole inversion and bandgap interface state density of 2×1011cm−2 eV−1 at HfO2/InAs interfaces," Applied Physics Letters, vol. 103, p. 143510, Oct 2013.
[15] C. A. Lin, M. L. Huang, P. C. Chiu, H. K. Lin, J. I. Chyi, T. H. Chiang, et al., "InAs MOS devices passivated with molecular beam epitaxy-grown Gd2O3 dielectrics," Journal of Vacuum Science & Technology B, vol. 30, p. 02B118, Mar 2012.
[16] J. W. Hsu, "Interfacial and Electrical Properties of Atomic Layer Deposited HfO2/InAs MOS Capacitor," Master′s Thesis, Electrical Engineering, National Central University, Taiwan, 2012.
[17] J. Wu, E. Lind, R. Timm, M. Hjort, A. Mikkelsen, and L. E. Wernersson, "Al2O3/InAs metal-oxide-semiconductor capacitors on (100) and (111)B substrates," Applied Physics Letters, vol. 100, p. 132905, Mar 2012.
[18] H. D. Trinh, G. Brammertz, E. Y. Chang, C. I. Kuo, C. Y. Lu, Y. C. Lin, et al., "Electrical Characterization of Al2O3/n-InAs Metal-Oxide-Semiconductor Capacitors With Various Surface Treatments," Ieee Electron Device Letters, vol. 32, pp. 752-754, Jun 2011.
[19] H. D. Trinh, E. Y. Chang, Y. Y. Wong, C. C. Yu, C. Y. Chang, Y. C. Lin, et al., "Effects of Wet Chemical and Trimethyl Aluminum Treatments on the Interface Properties in Atomic Layer Deposition of Al2O3on InAs," Japanese Journal of Applied Physics, vol. 49, p. 111201, Nov 2010.
[20] D. Wheeler, L. E. Wernersson, L. Froberg, C. Thelander, A. Mikkelsen, K. J. Weststrate, et al., "Deposition of HfO2 on InAs by atomic-layer deposition," Microelectronic Engineering, vol. 86, pp. 1561-1563, Sep 2009.
[21] G. Binnig, C. F. Quate, and C. Gerber, "Atomic Force Microscope," Physical Review Letters, vol. 56, pp. 930-933, Mar 1986.
[22] Veeco, "Scanning Probe Microscopy Training Notebook," ed: Veeco Metrology Group, 2000.
[23] E. H. Nicollian and A. Goetzberger: “, "The Si-SiO2 Interface - Electrical Properties as Determined by the Metal-Insulator-Silicon Conductance Technique," Bell Syst. Tech. J, vol. 46, pp. 1055-1133, 1967.
[24] L. M. Terman, "An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes," Solid-State Electronics, vol. 5, pp. 285-299, Sep 1962.
[25] D. Wheeler, "High-k-InAs metal-oxide-semiconductor capacitors formed by atomic-layer deposition," Doctoral Dissertation, Electrical Engineering, University of Notre Dame, United States of America, 2009.
[26] A. S. Babadi, E. Lind, and L. E. Wernersson, "Modeling of n-InAs metal oxide semiconductor capacitors with high-kappa gate dielectric," Journal of Applied Physics, vol. 116, p. 214508, Dec 2014.
[27] E. Lind, Y. M. Niquet, H. Mera, and L. E. Wernersson, "Accumulation capacitance of narrow band gap metal-oxide-semiconductor capacitors," Applied Physics Letters, vol. 96, p. 233507, Jun 2010.
[28] Y. Z. Guo and J. Robertson, "Chemical trends and passivation of defects at Al2O3:GaAs/InAs/InP/GaSb interfaces," Microelectronic Engineering, vol. 109, pp. 274-277, Sep 2013.
[29] G. Miceli and A. Pasquarello, "Defect levels at GaAs/Al2O3 interfaces: As-As dimer vs. Ga dangling bond," Applied Surface Science, vol. 291, pp. 16-19, Feb 2014.
[30] C. Y. Chen, C. H. Hsieh, W. J. Hsueh, and J. I. Chyi, "Preparation of InAs Surface by Hydrogen Plasma Pre-treatment for Low Interfacial Trap Density MOS Capacitors," presented at the International Conference on Solid State Devices and Materials, 2015.

指導教授

綦振瀛(Jen-Inn Chyi)

審核日期

2016-8-29

推文