摘要(英) |
In this paper, we use feature analysis to identify the scratch errors of the wafer map, and use the Hough transform to find the defects of straight lines and arcs on the wafer map. The actual wafer we used is the WM-811K wafer database provided by TSMC, and the error patterns can be divided into the following nine types: Center, Donut, Scratch, Edge-Ring, Edge-Loc, Loc, Near-Full, Random, None. And this paper is the part to distinguish Scratch.
First, we perform a noise reduction operation on the wafer map, remove discrete defects on the wafer map, and leave the more obvious cluster points on the wafer map. After the noise is reduced, the wafer map input map is converted into a gray-scale pattern, and the wafer map is adjusted and scaled to a uniform format array, so that it is convenient for parameter setting during Hough transformation.
Then, when looking for the shape of the straight line on the wafer map, we use the equation of the polar coordinate system instead of the linear equation to avoid that when the straight line is perpendicular to the X axis of the plane coordinate system, the slope is infinite and cannot be calculated. When looking for the shape of the arc on the wafer map, the ellipse equation is used to calculate. By applying these two formulas to the Hough transform algorithm to find the scratch pattern on the wafer map, it can be achieved based on feature analysis. Ways to identify the scratches on the wafer map.
Finally, the scratch patterns are identified by these two Hough transform methods, and part of the wafer map is taken from the WM-811K wafer map database for testing, and the numerical performance of Accuracy, Precision, and Recall is used to show the model of this paper. Judgment accuracy. |
參考文獻 |
[1] Mill-Jer Wang, Yen-Shung Chang, J.E. Chen, Yung-Yuan Chen, and Shaw-Cherng Shyu, “Yield Improvement by Test Error Cancellation”, Asian Test Symposium (ATS′96), pp.258-260, Nov. 1996.
[2] Ming-Ju Wu, Jyh-Shing Roger Jang, and Jui-Long Chen, “Wafer Map Failure Pattern Recognition and Similarity Ranking for Large-Scale Data Sets”, IEEE Transactions on Semiconductor Manufacturing, Vol 28, pp. 1-12, Feb. 2015.
[3] Takeshi Nakazawa, and Deepak V. Kulkarni, “Wafer Map Defect Pattern Classification and Image Retrieval Using Convolutional Neural Network”, IEEE Transaction on Semiconductor Manufacturing, Vol 31, pp. 309-314, May. 2018.
[4] Mengying Fan, Qin Wang, and Ben van der Waal, “Wafer defect patterns recognition based on OPTICS and multi-label classification”, IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC), pp. 912-915, Oct. 2016.
[5] Tsutomu Ishida, Izumi Nitta, Daisuke Fukuda, and Yuzi Kanazawa, “Deep Learning-Based Wafer-Map Failure Pattern Recognition Framework”, International Symposium on Quality Electronic Design (ISQED), pp. 291-297, Apr. 2019.
[6] 呂東穎, “Applications of Wafer Map Partition Analysisis to Enhance the Salient Pattern Identification”, 碩士論文, 中央大學, 2019.
[7] Katherine Shu-Min Li,Peter Yi-Yu Liao,Ken Chau-Cheung Cheng,Leon Li-Yang Chen,Sying-Jyan Wang,Andrew Yi-Ann Huang;Leon Chou,Gus Chang-Hung Han,Jwu E. Chen,Hsin-Chung Liang and Chung-Lung Hsu, “Hidden Wafer Scratch Defects Projection for Diagnosis and Quality Enhancement”, IEEE Transactions on Semiconductor Manufacturing, Feb. 2021.
[8] Tsutomu Ishida,Izumi Nitta,Daisuke Fukuda and Yuzi Kanazawa , “Deep Learning-Based Wafer-Map Failure Pattern Recognition Framework”, 20th International Symposium on Quality Electronic Design (ISQED) , April.2019 .
[9] Richard O. Duda, Peter E. Hart , “Use of the Hough transformation to detect lines and curves in pictures ”, Communications of the ACM, January.1972 .
[10] Bing Liu, “A Fast Density-Based Clustering Algorithm for Large Databases”, International Conference on Machine Learning and Cybernetics, pp. 996-1000, Aug. 2006.
[11] Cheng Hao Jin, Hyuk Jun Na, Minghao Piao, Gouchol Pok, and Keun Ho Ryu, “A Novel DBSCAN-Based Defect Pattern Detection and Classification Framework for Wafer Bin Map”, IEEE Transactions on Semiconductor Manufacturing, Vol. 32, pp. 286-292, May. 2019. |