新型pnp閘極結構之氮化鎵高電子遷移率電晶體

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：60

、訪客IP：3.135.183.190

姓名

蔡孟軒(Meng-Hsuan Tsai) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

新型pnp閘極結構之氮化鎵高電子遷移率電晶體
(Novel E-Mode pnp-GaN Gate AlGaN/GaN HEMTs)

相關論文

★ 電子式基因序列偵測晶片之原型	★ 增強型與空乏型砷化鋁鎵/砷化銦鎵假晶格高電子遷移率電晶體: 元件特性、模型與電路應用
★ 使用覆晶技術之微波與毫米波積體電路	★ 注入增強型與電場終止型之絕緣閘雙極性電晶體佈局設計與分析
★ 以標準CMOS製程實現之850 nm矽光檢測器	★ 600 V新型溝渠式載子儲存絕緣閘雙極性電晶體之設計
★ 具有低摻雜Ｐ型緩衝層與穿透型Ｐ＋射源結構之600V穿透式絕緣閘雙極性電晶體	★ 雙閘極金氧半場效電晶體與電路應用
★ 空乏型功率金屬氧化物半導體場效電晶體設計、模擬與特性分析	★ 高頻氮化鋁鎵/氮化鎵高速電子遷移率電晶體佈局設計及特性分析
★ 氮化鎵電晶體 SPICE 模型建立與反向導通特性分析	★ 加強型氮化鎵電晶體之閘極電流與電容研究和長時間測量分析
★ 新型加強型氮化鎵高電子遷移率電晶體之電性探討	★ 氮化鎵蕭特基二極體與高電子遷移率電晶體之設計與製作
★ 整合蕭特基p型氮化鎵閘極二極體與加強型p型氮化鎵閘極高電子遷移率電晶體之新型電晶體	★ 垂直型氧化鎵蕭特基二極體於氧化鎵基板之製作與特性分析

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

至系統瀏覽論文 ( 永不開放)

摘要(中)

本論文針對新型的 PNP閘極 (PNP-GaN gate)結構之氮化鎵高電子遷移率電晶體(HEMT)進行探討，該結構乃在傳統的p型氮化鎵閘極(p-GaN gate)結構中額外加入了一個PN-GaN二極體。研究包含新型元件的設計、 Silvaco TCAD元件特性模擬、元件製作以及電性測量分析，並比較新型的閘極結構與傳統p型氮化鎵閘極結構之元件特性差異。
相較於p-GaN gate HEMT，新型 PNP-GaN gate HEMT擁有較低的閘極漏電流，在 VGS = 10 V、 VDS = 10 V時低了147倍，此時新型 PNP-GaN gate HEMT 的導通電流/漏電流比(ID/IG)仍大於105。在閘極崩潰特性方面，新型 PNP-GaN gate HEMT達到了19.8 V，相比傳統 p-GaN gate HEMT，新閘極結構能有更大的電壓輸入範圍，閘極的十年壽命預估也可以到達10.5 V。額外的PN氮化鎵二極體使閘極施加正偏壓時產生壓降，元件臨界電壓因此得到提升，新型 PNP-GaN gate HEMT臨界電壓為 2.96 V，額外的壓降也使蕭特基二極體有更低的電場強度增加了閘極可靠度與操作範圍。輸入電容由於PN-GaN的加入，相比一般 p-GaN gate HEMT有更小的閘極電容。
此外，利用閘極絕緣層(isulator)進一步提升元件VTH以及降低閘極漏電流，提出的新型 MIS PNP-GaN gate HEMT也被製作，元件初步展示了具體增加的VTH和低的閘極漏電流。雖然元件仍在研發改善中，但仍展現了結合新型 PNP-GaN gate HEMT和閘極 MIS的元件潛力，讓 GaN HEMT的閘極偏壓更趨近於類似傳統 Si-based MOSFET的範圍和可靠度。

摘要(英)

This paper focuses on the studys of the novel PNP-GaN gate HEMT. This structure adds a PN-GaN diode to the traditional p-GaN gate structure. The research includes new device design, Silvaco TCAD device characteristics simulation, device fabrication, and electrical measurement analysis. The device characteristics are compared between the new gate structure and the traditional p-type GaN gate structure.
Comparing with the p-GaN gate HEMT, the PNP-GaN gate HEMT has smaller gate leakage, which has decreased about 147 times at VGS = 10 V, VDS = 10 V. At this time, the ID and IG ratio of the PNP-GaN gate HEMT is still greater than 105. In terms of gate breakdown characteristics, the novel PNP-GaN gate HEMT has reached 19.8 V. Compared with the traditional p-GaN gate HEMT, the new gate structure can have a larger gate drive range. The 10-year life expectancy of the gate can also reach 10.5 V. The additional PN-GaN diode causes a voltage drop when the gate is positive bias. The threshold voltage of the device is therefore increased. The threshold voltage of the new PNP-GaN gate HEMT is 2.96 V. The additional voltage drop also makes Schottky diode has a lower electric field which increases the reliability and bias range of the gate. Due to the addition of PN-GaN, the input capacitance has a smaller gate capacitance than the general p-GaN gate HEMT.
In addition, the use of gate insulator to further increase the VTH of the device and reduce the gate leakage current. The proposed new MIS PNP-GaN gate HEMT was also fabricated. The device initially demonstrate the increased VTH and low gate leakage current. Although the device is still being developed and improved, it still shows the potential of combining the new PNP-GaN gate HEMT and MIS gate. It makes the gate bias of GaN HEMT closer to the range and reliability of traditional Si-based MOSFETs.

關鍵字(中)

★ 增強型
★ 氮化鎵高電子遷移率電晶體
★ p型氮化鎵

關鍵字(英)

★ p-GaN gate HEMT
★ AlGaN/GaN HEMTs
★ normally off

論文目次

目錄
摘要 ................................................................................................................... I
Abstract ............................................................................................................ II
致謝 ................................................................................................................ III
目錄 ................................................................................................................ IV
圖目錄 ............................................................................................................ VI
表目錄 ............................................................................................................. X
第一章緒論 ..................................................................................................... 1
1.1 前言................................................................................................................ 1
1.2 AlGaN/GaN異質結構 .................................................................................. 3
1.3 p-GaN gate HEMT閘極特性改善文獻回顧 ................................................ 4
1.4 研究動機與目的.......................................................................................... 15
1.5 論文架構...................................................................................................... 15
第二章新型PNP-GaN gate HEMT之模擬、材料分析、佈局 .......................... 16
2.1 新型PNP-GaN gate HEMT之設計理念與模擬 ....................................... 16
2.1.1 元件設計理念 ....................................................................................................... 16
2.1.2 元件模擬 ............................................................................................................... 19
2.2 新型PNP-GaN gate HEMT之磊晶與材料分析 ....................................... 26
2.2.1 磊晶設計 ............................................................................................................... 26
2.2.2 二次離子質譜儀分析 ........................................................................................... 28
2.2.3 傳輸線模型量測接觸電阻 ................................................................................... 29
2.2.4 磊晶之水平崩潰量測 ........................................................................................... 30
2.2.5 磊晶之垂直崩潰量測 ........................................................................................... 32
2.2.6 FatFET 量測分析 .................................................................................................. 34
2.3 元件佈局...................................................................................................... 35
2.4 結論.............................................................................................................. 36
第三章新型PNP-GaN gate HEMT元件製作與電性分析 ................................. 37
3.1 元件製作流程.............................................................................................. 37
3.2 新型 PNP-GaN gate HEMT電性分析 ...................................................... 40
3.2.1 直流特性分析 ....................................................................................................... 40
3.2.2 動態特性分析 ....................................................................................................... 48
3.3 新型 MIS PNP-GaN gate HEMT電性分析 .............................................. 54
3.3.1 直流特性分析 ....................................................................................................... 54
3.3.2 動態特性分析 ....................................................................................................... 60
3.4 遲滯與閘極電容分析.................................................................................. 62
3.5 直流電性變溫量測及分析.......................................................................... 65
3.6 閘極十年壽命預估...................................................................................... 67
3.7 結論.............................................................................................................. 70
第四章結論 ................................................................................................... 71
參考文獻 ........................................................................................................ 72
附錄Ⅰ 新型PNP-GaN gate HEMT製程流程 ..................................................... 76
附錄ⅠⅠ 新型MIS PNP-GaN gate HEMT製程流程 ............................................. 79
Publication List/Acknowledgement .................................................................... 82

參考文獻

參考文獻
[1] F. Roccaforte, G. Greco, P. Fiorenza, and F. Iucolano, “An overview of normally-off GaN-based high electron mobility transistors,” Materials (Basel), vol. 12, no. 10, May 2019.
[2] Yole Developpement, “Power GaN 2019: Epitaxy, Devices, Applications & Technology Trends report,” Nov. 2019 [Online]. Available: http://www.yole.fr/iso_album/illus_power_gan_marketevolution_yole_nov2019.jpg
[3] X.Liu, D. Ji, and Y. Lu,“Scattering induced by Al segregation in AlGaN/GaN heterostructures” Applied Physics Letters, vol. 107, no. 7, Aug. 2015.
[4] H.-C. Chiu, C.-H. Liu, Y.-S. Chang, H.-L. Kao, R. Xuan, C.-W. Hu, and F.-T. Chien, “Dynamic Behavior Improvement of Normally-Off p-GaN High-Electron-Mobility Transistor Through a Low-Temperature Microwave Annealing Process,” IEEE Electron Devices Society, vol. 7, pp. 984 - 989, Sep. 2019.
[5] S. Ishiwaki, T. Iwaki, Y. Sugihara, K. Nanamori, and Masayoshi Yamamoto, “Analysis of False Turn-On Phenomenon of GaN HEMT with Parasitic Inductances for Propose Novel Design Method Focusing on Peak Gate Voltage,” 2017 IEEE Energy Conversion Congress and Exposition, Nov. 2017.
[6] T. Sugiyama, D. Iida, M. Iwaya, S. Kamiyama, H. Amano, and I. Akasaki, “Threshold voltage control using SiNx in normally off AlGaN/GaN HFET with p-GaN gate,” Phys. Status Solidi C, vol. 7, pp. 1980 - 1982, Jul. 2010.
[7] I. Hwang, J. Kim, Hyuk S. Choi, H. Choi, J. Lee, K. Y. Kim, J.-B. Park, J. C. Lee, J. Ha, J. Oh, J. Shin, and U.-I. Chung, “p-GaN gate HEMTs with tungsten gate metal for high threshold voltage and low gate current,” IEEE Electron Device Letters, vol. 34, no. 2, pp.202-204, Feb. 2013.
[8] F. Lee, L.-Y. Su, C.-H. Wang, Y.-R. Wu, and J. Huang, “Impact of gate metal on the performance of p-GaN/AlGaN/GaN high electron mobility transistors,” IEEE Electron Device Letters, vol. 36, no. 3, pp.232-234, Mar. 2015.
[9] Y.-n. Zhong, W.-C. Ho, Y.-C. Lai, and Y.-m. Hin,* Y.-T. Hsieh, H.-H. Tsai, and Y.-Z. Juang, “Improved Device Performance by Integrating Schottky p-GaN Gate Diode and E-mode p-GaN Gate HEMT for 650 V Application,” The 9th Asia-Pacific Workshop on Widegap Semiconductor (APWS2019), Okinawa, Nov. 10-15, 2019
[10] G. Zhou, Z. Wan, G. Yang, Y. Jiang, R. Sokolovskij, H. Yu, and G. Xia, “Gate leakage suppression and breakdown voltage enhancement in p-GaN HEMTs using metal/graphene gates,” IEEE Transactions on Electron Devices, vol. 67, no. 3, pp.875-880, Mar. 2020.
[11] C. Wang, M. Hua, J. Chen, S. Yang, Z. Zheng, J. Wei, L. Zhang, and K. J. Chen, “E-Mode p-n junction/AlGaN/GaN (PNJ) HEMTs,” IEEE Electron Device Letters, vol. 41, no. 4, pp.545-548, Apr. 2020.
[12] T. Pu, Y. Chen, X. Li, T. Peng, X. Wang, J. Li, W. He, J. Ben, Y. Lu, X. Liu, “Gate structure dependent normally-off AlGaN/GaN heterostructure field-effect transistors with p-GaN cap layer,” Journal of Physics D: Applied Physics, vol. 53, no. 41, Jul. 2020.
[13] C.-J. Yu, C.-W. Hsu, M.-C. Wu , W.-C. Hsu, C.-Y. Chuang, and J.-Z. Liu, “Improved DC and RF Performance of Novel MIS p-GaN-Gated HEMTs by Gate-All-Around Structure,” IEEE Transactions on Electron Devices, vol. 41, no. 5, pp.673-676, Mar. 2020.
[14] C.-H. Liu , H.-C. Chiu, C.-C. Chiu , “High-Gate-Voltage-Swing Region of Normally-Off p-GaN MIS-HEMT With ALD-Grown Al2O3/AlN Gate Insulator Layer,” 2020 International Conference on Compound Semiconductor Manufacturing Technology.
[15] C.-H. Liu, H.-C. Chiu, H. C. Wang, H. L. Kao, C. R. Haung, “High Gate Reliability and Low Leakage Current of Normally-Off AlGaN/p-GaN/AlN/AlGaN/GaN HEMT with Dual Junction Gate,” 2021 International Conference on Compound Semiconductor Manufacturing Technology.
[16] Silvaco, Inc, “Atlas User’s Manual DEVICE SIMULATION SOFTWARE,” Aug. 2016.
[17] J. Wei, S. Liu, B. Li, X. Tang, Y. Lu, C. Liu, M. Hua, Z. Zhang, G. Tang, and K. J. Chen, “Low On-Resistance Normally-Off GaN Double-Channel Metal–Oxide–Semiconductor High-Electron-Mobility Transistor,” IEEE Electron Device Letters, vol. 36, no.12, 1287 - 1290, Oct. 2015.
[18] T.-L. Wu, D. Marcon, S. You, N. Posthuma, B. Bakeroot, S. Stoffels, M. Van Hove, G. Groeseneken, and S. Decoutere, “Forward bias gate breakdown mechanism in enhancement-mode p-GaN gate AlGaN/GaN high-electron mobility transistors,” IEEE Electron Device Letters, vol. 36, no. 10, pp. 1001–1003, Oct. 2015.
[19] A. Stockman, F. Masin, M. Meneghini, E. Zanoni, G. Meneghesso, B. Bakeroot, and P. Moens, “Gate conduction mechanisms and lifetime modeling of p-Gate AlGaN/GaN high-electron-mobility transistors,” IEEE Transactions on Electron Devices, vol. 65, no. 12, pp. 5365–5372, Dec. 2018
[20] S. Stoffels, N. Posthuma, S. Decoutere, B. Bakeroot, A. N. Tallarico, E. Sangiorgi, C. Fiegna, J. Zheng, X. Ma, M. Borga, E. Fabris, M. Meneghini, E. Zanoni, G. Meneghesso, J. Priesol, and A. Satka,““Perimeter driven transport in the p-GaN gate as a limiting factor for gate reliability,” 2019 IEEE International Reliability Physics Symposium, Mar. 2019
[21] J. He, J. Wei, S. Yang, Y. Wang, K. Zhong, and K. J. Chen, “Frequency and temperature-dependent gate reliability of Schottky-type p-GaN gate HEMTs,” IEEE Transactions on Electron Devices, vol. 66, no. 8, pp. 3453–3458, Aug. 2019.
[22] M. Tapajna, O. Hilt, E. Bahat-Treidel, J. Würfl, and J. Kuzmík, “Gate Reliability Investigation in Normally-Off p-Type-GaN Cap/AlGaN/GaN HEMTs Under Forward Bias Stress,” IEEE Electron Device Letters, vol. 37, no. 4, pp.385-388, Feb. 2016.
[23] T.-L. Wu, B. Bakeroot, H. Liang, N. Posthuma, S. You, N. Ronchi, S. Stoffels, D. Marcon, and S. Decoutere, “Analysis of the Gate Capacitance–Voltage Characteristics in p-GaN/AlGaN/GaN Heterostructures,” IEEE Electron Device Letters, vol. 38, no. 12, pp.1696-1699, Oct. 2017.
[24] 賴育辰,“整合蕭特基整合蕭特基p型氮化鎵閘極二極體與加強型型氮化鎵閘極二極體與加強型p型氮化鎵閘極高電子遷移率型氮化鎵閘極高電子遷移率電晶體之新型電晶體電晶體之新型電晶體,” 中央大學電機系碩士論文中央大學電機系碩士論文, 2020.

指導教授

辛裕明(Yue-Ming Hsin)

審核日期

2021-9-23

推文