| 摘要(英) |
With the gradual aging of the population structure, there is an increasing demand for real-time medical monitoring of the elderly and long-term care groups. Consequently, more and more portable biomedical electronic products have come out. In recent years, the trend of health preservation and fitness has become more and more important for the public to understand their physical condition. The demand for the measurement and analysis of heartbeat, blood pressure, blood oxygen and other data is gradually increasing. Since the physiological signals of the human body are generally very small, and the bandwidths of various physiological signals are not the same, how to fully amplify and analyze the signals without being affected by noise is the main requirement of the biomedical sensor system. Therefore, the circuit design aims at low power consumption, low cost, and easy integration.
This thesis presents an implementation of a fully differential asynchronous successive-approximation analog-to-digital converter (SAR ADC) applied to biomedical signal sensing. By increasing the analog front-end circuit tracing time and fully differential input, improving the signal-to-noise ratio of the entire system is achieved. In applications with low bandwidth (less than 10 MHz) and medium resolution (10 to 14 bits), the SAR ADC is superior to the Sigma-Delta ADC in terms of power consumption. Using asynchronous clocks can achieve consistent performance and lower power consumption within a wide range of sampling frequencies. Its adjustable sampling frequency can be applied to the detection of physiological signals such as electroencephalogram (EEG), electrocardiogram (ECG) and electrooculogram (EOG). Compared with the conventional delay line architecture used in the high-speed SAR ADC, the architecture using the internal clock generator can operate at low frequency. The fully differential input can cancel DC offset of the front-end analog circuit and reduce variation of process, voltage and temperature on the system.
This work used TSMC 0.18 UM CMOS Mixed Signal RF General Purpose MiM FSG Al 1P6M 1.8&3.3 V process, the chip area is 0.680 mm2 (including ESD I/O PAD), supply voltage is 1.2 V. Input voltage range is 300 mV ~ 900 mV, 11-bit resolution, typical sampling rate is 400 S/s, and highest sampling rate is 10 kS/s. When the sampling frequency is 10 kS/s, whole chip power consumption is 1.7 µW, and the core circuit power consumption is 932 nW. |
| 參考文獻 |
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