新穎的多阻態之真亂數產⽣器由 40nm電阻式記憶體陣列實現

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呂睿洋(Ruei-Yang Lyu) 查詢紙本館藏

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電機工程學系

論文名稱

新穎的多阻態之真亂數產⽣器由 40nm電阻式記憶體陣列實現
(A Novel Multiple-resistive-state True Random Number Generator(msTRNG) Realized by 40-nm RRAM Array)

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至系統瀏覽論文 (2029-1-10以後開放)

摘要(中)

在網路世代中，資訊安全的議題時常被討論，許多安全算法需要利用到隨機亂數來作為種子(Seed)，而真亂數產生器(TRNGs)可以利用隨機電報雜Random Telegraph Noise (RTN)…等物理特性，來產生隨機的0和1字串，而這些物理特性難以用理論去預測其結果，使得一連串真隨機的亂數得以產生。本論文所設計的容量為 1Mb 的電阻式記憶體矩陣，將電阻式記憶體整合在電晶體的接觸點(Contact)上，在讀取過程電阻式記憶體中氧化層會產生電子的捕獲或釋放，導致每次電流的路徑(Filament)有所不同，這便是隨機電報雜訊，因此每次讀取所量到的電流會有所不同。操作方面，使用逐漸設置(Graduate SET)和逐漸重置(Graduate RESET)的機制去變化電阻式記憶體的阻態，將低阻態(LRS)和高阻態(HRS)分別區分出四個狀態，再利用電壓0.3V、操作時間50ns進行讀取，每個阻態分別連續讀取2000次進行統計，發現不同阻態下，其電阻值大小分布皆會呈現常態分佈，接著我們藉由電阻變化，進一步將訊號轉換成亂數。此電阻式記憶體產生的字串經由外部漢明距離(Inter Hamming Distance) 、內部漢明距離(Intra Hamming Distance)、漢明權重(Hamming Weight)等資訊理論的分析後，皆得到良好結果(~50%)，這意味此記憶體大量產生的字串具有隨機性，並非有規律性的產生0和1。在NIST測試中，室溫和高溫75度皆能通過全部15項驗證。本文將電阻式記憶體整合在電晶體的後段金屬連線上，形成新型的記憶體矩陣，此製程具有低功耗、低成本的性質，並且可以和未來的製程節點相容。

摘要(英)

In the age of the internet, issues related to information security are frequently discussed. Many security algorithms require the use of random numbers as seeds, and true random number generators (TRNG) can utilize physical properties, such as the random telegraph noise (RTN) to generate random sequences of bits-“0”s and bits-“1”s. These physical properties are difficult to predict theoretically, allowing the generation of a sequence of truly random numbers.
In this paper, a 1Mb capacity RRAM matrix is designed. The RRAM is integrated into the contacts of transistors. During the READ process, the RRAM′s oxide layer captures or releases electrons, leading to variations in the path of current flow (filament) with each READ, it is named as random telegraph noise. Thus, the measured current during each cycle is different. The graduate SET and graduate RESET mechanism is used to change the resistance states of the RRAM. Low resistance state (LRS) and high resistance state (HRS) are distinguished into four states. Read operation is performed with a voltage of 0.3V and a duration of 50ns. Each configuration is READ continuously 2000 times for statistical analysis. The resistance values exhibit a normal distribution. Subsequently, we can convert the signals into random numbers.
The strings generated by the tested RRAM array are analyzed using information theory metrics such as the inter Hamming distance, intra Hamming distance, Hamming weight, and all get good results (around 50%). This implies that the strings produced by this memory, exhibit randomness and do not follow a regular pattern of bits-“0”s and bits-“1”s.

關鍵字(中)

★ 電阻式記憶體
★ 真亂數產生器
★ 熱雜訊
★ 隨機電報雜訊
★ 記憶體矩陣

關鍵字(英)

★ RRAM
★ True Random Number Generator
★ Thermal Noise
★ Random Telegraph Noise
★ memory array

論文目次

摘要 I
Abstract II
致謝 III
圖目錄 VI
表目錄 VIII
第一章介紹 1
1.1背景 1
1.2 研究動機 2
1.3 論文架構 3
第二章電阻式記憶體陣列設計與量測方法 4
2.1 電阻式記憶體單一位元架構 4
2.1.1 電阻式記憶體介紹. 4
2.1.2 元件製備 4
2.2 電阻式記憶體陣列架構 5
2.3 電阻式記憶體設計之真亂數產生器介紹 6
2.4 電阻式記憶體設計之真亂數產生器優勢與劣勢 7
2.5 實驗設置 8
2.6 量測方式 9
2.6.1 形成操作(Forming Procedure) 9
2.6.2 重置操作(RESET Procedure) 9
2.6.3 設置設定(SET Procedure) 10
2.6.4 讀取操作 10
第三章真亂數產生器之熵 15
3.1 介紹 15
3.2 熱雜訊(Thermal Noise) 15
3.3 隨機電報雜訊方程式 16
3.3.1 捕捉時間和釋放時間 16
3.3.2 缺陷深度(Trap Depth) 16
3.3.2 缺陷能量(Trap Energy) 17
3.4 隨機電報雜訊量測結果 18
3.4.1 捕捉時間和釋放時間 18
3.4.2 缺陷深度 18
3.4.2 缺陷能量 18
3.5 雜訊電流振幅 19
3.5.1 雜訊電流振幅量測結果 19
3.6 結論 20
第四章量測結果 34
4.1 介紹 34
4.2電阻分布 35
4.3 馬賽克圖 35
4.4 外部漢明距離(Inter-Hamming Distance) 36
4.5 內部漢明距離(Intra-Hamming Distance) 36
4.6 漢明權重(Hamming Weight) 37
4.7 自相關函數(Autocorrelation Plot) 37
4.8 國家標準暨技術研究院隨機性測試 38
第 5 章總結 68
參考文獻 70

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指導教授

謝易叡(E-Ray Hsieh)

審核日期

2024-1-11

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