博碩士論文 108324068 詳細資訊




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姓名 葉靜諭(Ching-Yu Yeh)  查詢紙本館藏   畢業系所 化學工程與材料工程學系
論文名稱 界金屬化合物Cu6Sn5在Sn/Cu及Bi/Cu界面的生長模型
(Growth model of Cu6Sn5 compound at the Sn/Cu and Bi/Cu interface)
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檔案 [Endnote RIS 格式]    [Bibtex 格式]    [相關文章]   [文章引用]   [完整記錄]   [館藏目錄]   至系統瀏覽論文 (2029-7-4以後開放)
摘要(中) 建立和提出界面Cu6Sn5化合物在Cu/Sn3.5Ag環形界面和Cu/Bi/Sn結構的Bi/Cu界面的生長模型。我們發現,建構的生長模型能夠很好地預測環形界面處Cu6Sn5化合物生長曲線。此外,環形界面處的Cu6Sn5化合物生長速度比平面界面處的要慢,而導致環形界面處Cu6Sn5化合物生長速度較慢的主要因素是隨著退火時間的增加,Cu6Sn5/solder環形界面的反應區域增加,導致界面Cu6Sn5化合物溶解到solder matrix中的驅動力更大,從而減少了界面Cu6Sn5化合物的生長。 另外,針對Bi/Cu界面處的Cu6Sn5化合物生長,本研究得出以下結論:(1) 當Cu/Sn之間有Bi層存在時,將促進Cu6Sn5的生長;(2) Cu6Sn5在Bi/Cu6Sn5界面處的生長是一個反應控制過程;(3) 在Bi/Cu6Sn5界面處形成的Cu6Sn5化合物層非常均勻,這與Sn和Cu之間形成的典型扇貝狀Cu6Sn5化合物非常不同。我們推測,Bi(或Sn)原子在其晶格結構中鄰近Cu6Sn5生長平面的位置必須被空出,為待填充的Sn位置提供空間。我們發現,Bi中的空位擴散率(Dva)比Sn中的空位擴散率高約三個數量級。這表明,在Cu/Bi/Sn系統中,空位將比在Cu/Sn系統中更快地提供給位於Cu6Sn5生長平面旁邊的待填充Sn位置,在Cu6Sn5/Bi界面處能更快地補充空位,使待填充的Sn和Cu位置更快地填滿Sn和Cu原子,促進了Cu6Sn5化合物的生長。
摘要(英) The growth model of the interfacial Cu6Sn5 compound at the circular Cu/Sn3.5Ag interface and the Bi/Cu interface of the Cu/Bi/Sn structure have been established and proposed. We found that the present developed growth model can predict well the interfacial Cu6Sn5 compound growth curve at the circular-interface. Also, the interfacial Cu6Sn5 compound growth rate at the circular-interface is slower than that at the planar-interface. The major factor for the slower interfacial Cu6Sn5 compound growth rate at the circular-interface attributes to the increase of the interfacial reaction area at the circular Cu6Sn5/solder interface with the annealing time. It causes a larger driving force for the interfacial Cu6Sn5 compound to dissolve into the solder matrix, which reduces the growth of the interfacial Cu6Sn5 compound layer. For the case of interfacial Cu6Sn5 compound growth at Bi/Cu interface, the present results conclude that (1) the Bi insertion layer greatly enhances the Cu6Sn5 formation, (2) the Cu6Sn5 formation is a reaction-controlled process at the Bi/Cu6Sn5 interface, and (3) the Cu6Sn5 compound layer formed at the Bi/Cu6Sn5 interface is very uniform, which is very different from the typical scallop-type Cu6Sn5 compound formed between Sn and Cu. We conclude that the vacancy formation in the Bi (or Sn) lattice structure adjacent to the Cu6Sn5 growth sites plays a key role for the Cu6Sn5 growth at the Bi/Cu6Sn5 and Sn/Cu6Sn5 interface, which renders the to-be-filled Sn sites in Cu6Sn5 compound phase space to be filled with Sn atoms. Thus, the vacancy formation and diffusion in the Bi and Sn lattice adjacent to the Cu6Sn5 growth sites governs the growth kinetics of the Cu6Sn5 layer. The vacancy diffusivity in Bi is much larger than that in Sn by about three orders of magnitude. It results in a quicker vacancy replenishment at the Cu6Sn5/Bi interface, which promotes the Cu6Sn5 growth at the Bi/Cu6Sn5 interface.
關鍵字(中) ★ 介金屬化合物
★ 錫鉍
★ 銲料
★ 介面反應
關鍵字(英) ★ intermetallic compound
★ SnBi
★ solder
★ interfacial reaction
論文目次 Table of contents
Abstract (Chinese) ⅰ
Abstract (English) ⅱ
Table of contents ⅳ
List of figures ⅵ
List of tables ……………………………………………………………………….ⅷ
Chapter 1: Background 1
1.1 Advanced Packaging Technology 1
1.2 The commonly used solders in Advanced Packaging Technology 8
1.2.1 SAC-based solders 8
1.2.2 Low melting temperature solders…… …………………………10
1.3 Future trends in semiconductor substrates 15
Chapter 2: Motivation 17
2.1 The circular-interface affect the growth kinetics of the Cu-Sn intermetallic compounds 17
2.2 The Bi effect on Cu-Sn intermetallic compounds growth 18
Chapter 3: Experimental 19
3.1 Sample preparing for Sn/Cu/Sn sandwich structure 19
3.2 Sample preparing for Cu/Bi/Sn thin films 21
Chapter 4: Cu-Sn IMC growth model at Sn/Cu circular interface 23
4.1 Cu Sn intermetallic compounds formation between Cu wire and Sn3.5Ag solder 23
4.2 Cu6Sn5 growth kinetic model at circular Cu/Sn3.5Ag interface 24
4.3 Influence of Ag content on the Cu6Sn5 growth at circular Cu/solder interface…… 30
Chapter 5: Cu6Sn5 growth model at the Bi/Cu interface 32
5.1 Thin film growth mode for Cu/Sn and Cu/Bi/Sn systems 32
5.2 Growth mechanism of Cu-Sn IMC in Cu/Bi/Sn thin film 35
5.3 Kink space for Cu/Sn and Cu/Bi/Sn systems 42
5.4 Vacancy diffusivity in Bi and Sn 49
Chapter 6: Summary 51
6.1 Growth model and mechanism of interfacial intermetallic compound at circular Cu/Sn3.5 Ag interface 51
6.2 Atomic growth model of Cu6Sn5 compound at the Bi/Cu interface...……52
References 53
參考文獻 References
1. Z. Chen, J. Zhang, S. Wang, C.P. Wong, “Challenges and prospects for advanced packaging”, Fundamental Research, 2023.
2. Mika Kimura, Yu Aoki, Lee Sangchul, Akitoshi Tanimoto, Mamoru Sasaki, “Low temperature curable photosensitive dielectric material with high resolution”, Journal of Photopolymer Science and Technology, 30(2), 153-155, 2017.
3. Fukushima, T., Alam, A., Hanna, A., Jangam, S. C., Bajwa, A. A., & Iyer, S. S. “Flexible hybrid electronics technology using die-first FOWLP for high-performance and scalable heterogeneous system integration.” IEEE Transactions on Components, Packaging and Manufacturing Technology 8.10, 1738-1746, 2018.
4. Podpod, A., Phommahaxay, A., Bex, P., Slabbekoorn, J., Bertheau, J., Salahoueldhadj, A., ... & Arnold, K. “Advances in temporary carrier technology for high-density fan-out device build-up.” 2019 IEEE 69th Electronic Components and Technology Conference (ECTC) (pp. 340-345), May 2019.
5. D. Yu, 1st ed, 3D Packaging Technology with Through Silicon Vias, Publishing House of Electronics Industry, Beijing, 2021.
6. Arriola, E. R., Ubando, A. T., Gonzaga, J. A., & Lee, C. C. “Wafer-level chip-scale package lead-free solder fatigue: A critical review.” Engineering Failure Analysis, 144, 106986, 2023.
7. Chang, K. C., & Chiang, K. N. “Solder joint reliability analysis of a wafer‐level CSP assembly with cu studs formed on solder pads.” Journal of the Chinese Institute of Engineers, 26(4), 467-479, 2003.
8. Nagapurkar, Prashant, and Sujit Das. “Economic and embodied energy analysis of integrated circuit manufacturing processes.” Sustainable Computing: Informatics and Systems, 35, 100771, 2022.
9. Chandana, Y. Venkata Naga, and N. Venu Kumar. “Drop test analysis of ball grid array package using finite element methods.” Materials Today: Proceedings, 64, 675-679, 2022.
10. Wong, Ee-Hua, S. K. W. Seah, and V. P. W. Shim. “A review of board level solder joints for mobile applications.” Microelectronics Reliability, 48.11-12, 1747-1758, 2008.
11. Che, F. X., Ho, D., Ding, M. Z., & MinWoo, D. R. “Study on process induced wafer level warpage of fan-out wafer level packaging.” 2016 IEEE 66th Electronic Components and Technology Conference (ECTC) (pp. 1879-1885), May 2016.
12. Takekoshi, M., Nishido, K., Okada, Y., Suzuki, N., & Nonaka, T. “Warpage suppression during FO-WLP fabrication process.” 2017 IEEE 67th Electronic Components and Technology Conference (ECTC) (pp. 902-908), May 2017.
13. Chen, C., Yu, D., Wang, T., Xiao, Z., & Wan, L. “Warpage prediction and optimization for embedded silicon fan-out wafer-level packaging based on an extended theoretical model.” IEEE Transactions on Components, Packaging and Manufacturing Technology, 9(5), 845-853, 2019.
14. Braun, T.; Becker, K.-F.; Hoelck, O.; Voges, S.; Kahle, R.; Dreissigacker, M.; Schneider-Ramelow, M. “Fan-Out Wafer and Panel Level Packaging as Packaging Platform for Heterogeneous Integration”. Micromachines, 10, 342, 2019.
15. Chaware, R., Hariharan, G., Lin, J., Singh, I., O′Rourke, G., Ng, K., ... & Cheng, S. K. “Assembly challenges in developing 3D IC package with ultra-high yield and high reliability”, In 2015 IEEE 65th Electronic Components and Technology Conference (ECTC) (pp. 1447-1451), May 2015.
16. Chen, Y., Niu, D., Xie, Y., & Chakrabarty, K. “Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis”, In 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (pp. 471-476), November 2010.
17. Chen, C. K., Warner, K., Yost, D. R. W., Knecht, J. M., Suntharalingam, V., Chen, C. L., ... & Keast, C. L. “Scaling three-dimensional SOI integrated-circuit technology.” In 2007 IEEE International SOI Conference (pp. 87-88), October 2007.
18. Salvi, Swapnil S., and Ankur Jain. “A review of recent research on heat transfer in three-dimensional integrated circuits (3-D ICs).” IEEE Transactions on Components, Packaging and Manufacturing Technology, 11.5, 802-821, 2021.
19. Alam, S. M., Jones, R. E., Pozder, S., & Jain, A. “Die/wafer stacking with reciprocal design symmetry (RDS) for mask reuse in three-dimensional (3D) integration technology.” 2009 10th International Symposium on Quality Electronic Design. IEEE, March 2009.
20. Liu, Shen, and Yong Liu. “Modeling and simulation for microelectronic packaging assembly: manufacturing, reliability and testing”. John Wiley & Sons, 2011.
21. Xu, Y., Xian, J., Stoyanov, S., Bailey, C., Coyle, R. J., Gourlay, C. M., & Dunne, F. P. “A multi-scale approach to microstructure-sensitive thermal fatigue in solder joints.” International Journal of Plasticity, 155, 103308, 2022.
22. Qian, Zhengfang, Wei Ren, and Sheng Liu. “A damage coupling framework of unified viscoplasticity for the fatigue of solder alloys.” 162-168, 1999.
23. Nai, S. M. L., J. Wei, and M. Gupta. “Interfacial intermetallic growth and shear strength of lead-free composite solder joints.” Journal of Alloys and Compounds, 473.1-2, 100-106, 2009.
24. Laurila, Tomi, Vesa Vuorinen, and J. K. Kivilahti. “Interfacial reactions between lead-free solders and common base materials.” Materials Science and Engineering: R: Reports, 49.1-2, 1-60, 2005.
25. Peng, Weiqun, Eduardo Monlevade, and Marco E. Marques. “Effect of thermal aging on the interfacial structure of SnAgCu solder joints on Cu.” Microelectronics Reliability, 47.12, 2161-2168, 2007.
26. Tan, Chi Ying, Mohd Arif Anuar Mohd Salleh, and Norainiza Saud. “The study of interfacial reaction between SnAgCu (SAC) lead-free solder alloys and copper substrate: a short review.” IOP Conference Series: Materials Science and Engineering. Vol. 864. No. 1. IOP Publishing, 2020.
27. Tu, King-Ning, and K. Zeng. “Tin–lead (SnPb) solder reaction in flip chip technology.” Materials science and engineering: R: reports, 34.1, 1-58, 2001.
28. Li, J. F., P. A. Agyakwa, and C. M. Johnson. “Effect of trace Al on growth rates of intermetallic compound layers between Sn-based solders and Cu substrate.” Journal of Alloys and Compounds, 545, 70-79, 2012.
29. Chen, B. L., and G. Y. Li. “Influence of Sb on IMC growth in Sn–Ag–Cu–Sb Pb-free solder joints in reflow process.” Thin solid films, 462, 395-401, 2004.
30. Pang, J. H., Xu, L., Shi, X. Q., Zhou, W., & Ngoh, S. L. “Intermetallic growth studies on Sn-Ag-Cu lead-free solder joints.” Journal of Electronic Materials, 33, 1219-1226, 2004.
31. Mayappan, R., Yahya, I., Ghani, N. A. A., & Hamid, H. A “The effect of adding Zn into the Sn–Ag–Cu solder on the intermetallic growth rate.” Journal of Materials Science: Materials in Electronics, 25, 2913-2922, 2014.
32. Leong, Y. M., Haseeb, A. S. M. A., Nishikawa, H., & Mokhtari, O. “Microstructure and mechanical properties of Sn–1.0 Ag–0.5 Cu solder with minor Zn additions.” Journal of Materials Science: Materials in Electronics, 30, 11914-11922, 2019.
33. Jayaram, V., Gupte, O., Bhangaonkar, K., & Nair, C. “A Review of Low Temperature Solders in Microelectronics Packaging.” IEEE Transactions on Components, Packaging and Manufacturing Technology, 2023.
34. Gupte, O., Murtagian, G., Tummala, R., & Smet, V. “Thermal aging reliability of socketable, surface-modified solder BGAs with and without polymer collars.” 2020 IEEE 70th Electronic Components and Technology Conference (ECTC). IEEE, June 2020.
35. Silva, Bismarck Luiz, Amauri Garcia, and José Eduardo Spinelli. “Complex eutectic growth and Bi precipitation in ternary Sn-Bi-Cu and Sn-Bi-Ag alloys.” Journal of Alloys and Compounds, 691, 600-605, 2017.
36. Božinović, K. N., Manasijević, D. M., Balanović, L. T., Gorgievski, M. D., Stamenković, U. S., Marković, M. S., & Mladenović, Z. D. “Study of microstructure, hardness and thermal properties of Sn-Bi alloys.” Hemijska industrija, 75.4, 227-239, 2021.
37. Wang, F., Huang, Y., Zhang, Z., & Yan, C. “Interfacial reaction and mechanical properties of Sn-Bi solder joints.” Materials, 10.8, 920, 2017.
38. Myung, W. R., Ko, M. K., Kim, Y., & Jung, S. B. “Effects of Ag content on the reliability of LED package component with Sn–Bi–Ag solder.” Journal of Materials Science: Materials in Electronics, 26, 8707-8713, 2015.
39. Vandevelde, B., Nawghane, C., Labie, R., Lauwaert, R., & Werkhoven, D. “Enhanced processability and thermal fatigue reliability with low melting point SnBi solder alloy LMPA-Q.” International Electronic Packaging Technical Conference and Exhibition. Vol. 85505. American Society of Mechanical Engineers, October 2021.
40. Zhang, Liang, Lei Sun, and Yong-huan Guo. “Microstructures and properties of Sn58Bi, Sn35Bi0.3Ag, Sn35Bi1.0Ag solder and solder joints.” Journal of Materials Science: Materials in Electronics, 26, 7629-7634, 2015.
41. Young, K., Aspandiar, R., Badwe, N., Walwadkar, S., Lee, Y. W., & Lee, T. K. “Thermal cycling induced interconnect stability degradation mechanism in low melting temperature solder joints.” 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC). IEEE, May 2022.
42. Chen, Y., Wang, C., Gao, Y., Gao, Z., & Liu, Z. Q. “Microstructural evolution and failure analysis of Sn–Bi57–Ag0.7 solder joints during thermal cycling.” Journal of Materials Science: Materials in Electronics, 1-11, 2022.
43. Shimizu, K., Nakanishi, T., Karasawa, K., Hashimoto, K., & Niwa, K. “Solder joint reliability of indium-alloy interconnection.” Journal of electronic materials, 24, 39-45, 1995.
44. Liu, Y., and K. N. Tu. “Low melting point solders based on Sn, Bi, and In elements.” Materials Today Advances, 8, 100115, 2020.
45. Choi, Won Kyoung, and Hyuck Mo Lee. “Effect of soldering and aging time on interfacial microstructure and growth of intermetallic compounds between Sn-3.5 Ag solder alloy and Cu substrate.” Journal of Electronic Materials, 29, 1207-1213, 2000.
46. Lee, T. Y., Choi, W. J., Tu, K. N., Jang, J. W., Kuo, S. M., Lin, J. K., ... & Kivilahti, J. K. “Morphology, kinetics, and thermodynamics of solid-state aging of eutectic SnPb and Pb-free solders (Sn–3.5Ag, Sn–3.8Ag–0.7Cu and Sn–0.7Cu) on Cu.” Journal of Materials Research, 17.2, 291-301, 2002.
47. Yuan, Y., Li, D., Guan, Y., Seifert, H. J., & Moelans, N. “Investigation of the diffusion behavior in Sn-xAg-yCu/Cu solid state diffusion couples.” Journal of Alloys and Compounds, 686, 794-802, 2016.
48. Guo, F., Choi, S., Lucas, J. P., & Subramanian, K. N. “Microstructural characterisation of reflowed and isothermally‐aged Cu and Ag particulate reinforced Sn‐3.5Ag composite solders.” Soldering & surface mount technology, 13.1, 7-18, 2001.
49. Liu, Xiangdong, Siliang He, and Hiroshi Nishikawa. “Low temperature solid-state bonding using Sn-coated Cu particles for high temperature die attach.” Journal of Alloys and Compounds, 695, 2165-2172, 2017.
50. Chen, K., Wang, D., Ling, H., Hu, A., Li, M., Zhang, W., & Cao, L. “Effects of Sn grain size on intermetallic compounds formation in 5 µm diameter Cu/Sn pillar bumps.” Journal of Materials Science: Materials in Electronics, 29, 19484-19490, 2018.
51. Belhadi, M. E. A., Hamasha, S. D., Alahmer, A., Zhao, R., Prorok, B. C., & Alavi, S. “The impact of Bi content on the coarsening kinetics of IMC particles and creep deformation under thermal cycling.” Journal of Electronic Materials, 53.1, 380-393, 2024.
52. Lai, Y., Hu, X., Li, Y., & Jiang, X. “Influence of Bi addition on pure Sn solder joints: interfacial reaction, growth behavior and thermal behavior.” Journal of Wuhan University of Technology-Mater. Sci., Ed. 34.3, 668-675, 2019.
53. Kang, T. Y., Xiu, Y. Y., Liu, C. Z., Hui, L., Wang, J. J., & Tong, W. P. “Bismuth segregation enhances intermetallic compound growth in SnBi/Cu microelectronic interconnect.” Journal of Alloys and Compounds, 509.5, 1785-1789, 2011.
54. Hu, X., Li, Y., Li, K., & Min, Z. “Effect of Bi segregation on the asymmetrical growth of Cu-Sn intermetallic compounds in Cu/Sn-58Bi/Cu sandwich solder joints during isothermal aging.” Journal of electronic materials, 42, 3567-3572, 2013.
55. Paul, A., C. Ghosh, and W. J. Boettinger. “Diffusion parameters and growth mechanism of phases in the Cu-Sn system.” Metallurgical and materials transactions A, 42, 952-963, 2011.
56. Greene, J. E. “Thin film nucleation, growth, and microstructural evolution: an atomic scale view.” Handbook of deposition technologies for films and coatings. William Andrew Publishing, 2010. 554-620.
57. Gordon, Péter, and Tamás Hurtony. “Investigation of the wetting properties of Cu6Sn5 intermetallic compound.” 2015 38th International Spring Seminar on Electronics Technology (ISSE). IEEE, 2015.
58. Dybkov, Vasiliĭ Ivanovich. “Reaction diffusion and solid state chemical kinetics.” 1-334, 2010.
59. Tu, King-Ning, and R. D. Thompson. “Kinetics of interfacial reaction in bimetallic Cu-Sn thin films.” Acta Metallurgica, 30.5, 947-952, 1982.
60. Chopra, R., M. Ohring, and R. S. Oswald. “Low temperature compound formation in CuSn thin film couples.” Thin Solid Films, 94.4, 279-288, 1982.
61. Ma, X., Wang, F., Qian, Y., & Yoshida, F. “Development of Cu–Sn intermetallic compound at Pb-free solder/Cu joint interface.” Materials Letters, 57.22-23, 3361-3365, 2003.
62. Tang, W. M., He, A. Q., Qi, L., & Ivey, D. G. “Solid state interfacial reactions in electrodeposited Cu/Sn couples.” Transactions of nonferrous metals society of China, 20.1, 90-96, 2010.
63. Yang, T. L., Yu, J. J., Shih, W. L., Hsueh, C. H., & Kao, C. R. “Effects of silver addition on Cu–Sn microjoints for chip-stacking applications.” Journal of alloys and compounds, 605, 193-198, 2014.
64. Labie, Riet, Wouter Ruythooren, and Jan Van Humbeeck. “Solid state diffusion in Cu–Sn and Ni–Sn diffusion couples with flip-chip scale dimensions.” Intermetallics, 15.3, 396-403, 2007.
65. Sanabria, Charlie. “A new understanding of the heat treatment of Nb-Sn superconducting wires.” PhD Thesis. The Florida State University, 2017.
66. Dyson, B. F., T. R. Anthony, and D. Turnbull. “Interstitial diffusion of copper in tin.” Journal of Applied Physics, 38.8, 3408-3408, 1967.
67. Liu, P., Wang, S., Li, D., Li, Y., & Chen, X. Q. “Fast and huge anisotropic diffusion of Cu (Ag) and its resistance on the Sn self-diffusivity in solid β–Sn.” Journal of Materials Science & Technology, 32.2, 121-128, 2016.
68. Shang, S. L., Zhou, B. C., Wang, W. Y., Ross, A. J., Liu, X. L., Hu, Y. J., ... & Liu, Z. K. “A comprehensive first-principles study of pure elements: vacancy formation and migration energies and self-diffusion coefficients.” Acta Materialia, 109, 128-141, 2016.
指導教授 劉正毓(Cheng-Yi Liu) 審核日期 2024-7-13
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