應用於第五代和第六代無線通訊之互補式金氧半導體堆疊式與連續 B 類模式功率放大器之研製

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：38

、訪客IP：3.21.246.149

姓名

翁浩昀(Hao-Yun Weng) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用於第五代和第六代無線通訊之互補式金氧半導體堆疊式與連續 B 類模式功率放大器之研製
(Implementations of CMOS Stacked and Continuous Class B Mode Power Amplifiers for 5G and 6G Wireless Communications)

相關論文

★ 應用於筆記型電腦數位電視單極天線之研製	★ 應用於數位機上盒與纜線數據機之電纜多媒體傳輸標準多工濾波器
★ 印刷共面波導饋入式多頻帶與超寬頻天線設計	★ 微波存取全球互通頻段前向匯入式功率放大器與高效率Class F類功率放大器暨壓控振盪器電路之研製
★ 應用於矽基功率放大器與混頻器之傳輸線型變壓器研究	★ 應用於V-頻段射頻收發機前端電路之低功耗源極注入式混頻器之研製
★ 應用積體電路上方後製程與整合被動元件於互補式金氧半導體製程之系統封裝研究	★ 應用fT-倍頻電路架構於毫米波壓控振盪器與注入鎖定除頻器之研製
★ 應用傳輸線型變壓器於X/K–Ka/V頻段全積體整合之寬頻互補式金氧半導體功率放大器研製	★ 應用於K / V 頻段低功耗混頻器之研製
★ 應用於K/V頻段之低功耗CMOS低雜訊放大器之研究	★ 應用於5-GHz CMOS射頻前端電路之低電壓自偏壓式混頻器與高線性化功率放大器之研製
★ 應用於 K 頻段射頻接收機之寬頻低功耗 CMOS 低雜訊放大器之研製	★ 應用磁耦合變壓器於K頻段之低功耗互補式金氧半導體壓控振盪器研製
★ 應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製	★ 應用於C/X頻段全積體整合之互補式金氧半導體寬頻低功耗降頻器與寬頻功率混頻器之研製

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

至系統瀏覽論文 ( 永不開放)

摘要(中)

此篇論文使用台灣積體電路製造股份有限公司 (tsmcTM) 0.18-µm CMOS製程，設計應用於第五代和第六代通訊的三顆晶片，此三顆晶片分別為應用於n77頻段之差動堆疊式功率放大器、應用於X頻段之差動堆疊式功率放大器、應用於X頻段之連續B類堆疊式功率放大器。
第二章分成兩部份：第一顆晶片為應用於n77頻段之兩級差動堆疊式功率放大器，此設計採用基於磁耦合變壓器之堆疊式架構，同時使用電阻式自偏壓方法減少電路不穩定性和複雜性。量測結果顯示在n77頻段內最大傳輸增益為13.39 dB，操作頻帶為3.6 ~ 4.4 GHz，頻帶飽和輸出功率為22 ~ 23.1 dBm，1-dB增益壓縮點輸出功率為12.9 ~ 14.9 dBm，最高功率附加效率為6.9 ~ 9.3 %，晶片面積為3.77 mm2 (2.85 mm×1.32 mm)。第二顆晶片為應用於X頻段之兩級差動堆疊式功率放大器，此設計採用基於磁耦合變壓器之堆疊式架構，使用獨立閘極電壓，操作頻帶為7.7 ~ 8.3 GHz，最大傳輸增益為12.2 dB，頻帶飽和輸出功率為20.2 ~ 22.6 dBm，最高功率附加效率為6.2 ~ 8.6 %，1-dB增益壓縮點之輸出功率為13.6 ~ 15.6 dBm，晶片面積為2.1 mm2 (2.08 mm×1.02 mm)。
第三章的第三顆晶片為應用於X頻段之兩級連續B類堆疊式功率放大器，此設計輸出利用輸出端共振腔達到二倍頻開路之效果，以抑制二次諧波和增加頻寬。在功率級堆疊式電晶體間加入一米勒電容以達到特性的最佳化，其操作頻寬包含的頻段為6.2 – 7.8 GHz，最大傳輸增益為12.5 dB，頻帶飽和輸出功率為20.3 ~ 22.6 dBm，最高功率附加效率約為8.7 ~ 14.5 %，1-dB增益壓縮點之輸出功率為14.5 ~ 16.2 dBm，晶片面積為1.85 mm2 (1.61 mm × 1.15 mm)。

摘要(英)

This thesis proposed three power amplifiers (PAs) which were designed and fabricated in in tsmcTM 0.18-µm CMOS technologies to design three chips for 5th and 6th generation communication system applications. These three chips are a differential stack power amplifier for n77 band, a differential stack power amplifier for X band, and a continuous mode class B stack power amplifier for X band.
Chapter 2 is divided into two parts. The first chip presents a two-stage differential stacked power amplifier for n77 band. This design adopts a stacked structure based on magnetically coupled transformers, and uses resistive self-biasing to reduce circuit instability and complexity. The measurement results show that the maximum power gain in the n77 band is 13.39 dB, the operating band is 3.6 ~ 4.4 GHz, the saturation output power is 22 ~ 23.1 dBm, the 1-dB gain compression point output power is 12.9 ~ 14.9 dBm, the maximum PAE is 6.9 ~ 9.3%, and the chip area is 3.77 mm2 (2.85 mm × 1.32 mm). The second chip presents a two-stage differential stacked power amplifier for X-band. This design adopts a stacked structure based on magnetically coupled transformers and uses independent gate voltages. The operating band is 7.7 ~ 8.3 GHz, the maximum power gain is 12.2 dB, the band saturation output power is 20.2 ~ 22.6 dBm, the maximum PAE is 6.2 ~ 8.6 %, the output power at 1-dB gain compression point is 13.6 ~ 15.6 dBm, and the chip area is 2.1 mm2 (2.08 mm×1.02 mm).
In Chapter 3, the third chip presents a two-stage continuous class-B stacked power amplifier for X-band. The output of this design uses the resonator at the output port to achieve a dual-frequency open circuit effect to suppress the second harmonic and increase the bandwidth. A Miller capacitor is added between the power stage stacked transistors to optimize the characteristics. Its operating bandwidth includes 6.2 – 7.8 GHz, the maximum power gain is 12.5 dB, the band saturation output power is 20.3 ~ 22.6 dBm, the highest PAE is about 8.7 ~ 14.5 %, and the output power at the 1-dB gain compression point is 14.5 ~ 16.2 dBm. The chip area is 1.85 mm2 (1.61 mm × 1.15 mm).

關鍵字(中)

★ 功率放大器
★ 差動堆疊式
★ 第五代和第六代無線通訊

關鍵字(英)

★ Power Amplifier
★ differential stacked
★ 5th and 6th generation communication system

論文目次

摘要 i
Abstract ii
致謝 iv
目錄 vi
圖目錄 viii
表目錄 xiii
第一章緒論 1
1-1 研究動機 1
1-2 研究成果 1
1-3 章節簡介 2
第二章應用於5G和6G通訊之CMOS差動互補式功率放大器 3
2-1 研究現況 3
2-2 功率放大器簡介 5
2-3 堆疊功率放大器介紹 8
2-4 磁耦合變壓器共振腔介紹 10
2-5 應用於n77頻段差動堆疊式功率放大器 11
2-5-1 電路架構圖 11
2-5-2 電晶體尺寸選擇與自偏壓 13
2-5-3 功率級單元和輸出端匹配設計 15
2-5-4 驅動級單元和級間匹配設計 22
2-5-5 輸入端匹配設計 28
2-5-6 電路模擬與量測結果 31
2-5-7 結果比較與討論 44
2-6 應用於X頻段兩級差動堆疊式功率放大器 51
2-6-1 電路架構圖 51
2-6-2 選擇偏壓抑制諧波 53
2-6-3 功率級單元和輸出端匹配 54
2-6-4 驅動級單元和級間匹配設計 61
2-6-5 輸入端匹配設計 67
2-6-6 電路模擬與量測結果 70
2-6-7 結果比較與討論 83
第三章應用於6G通訊之連續B類堆疊式功率放大器 90
3-1 研究現況 90
3-2 連續模式技術介紹 92
3-3 應用於X頻段連續B類堆疊式功率放大器 96
3-3-1 電路架構圖 96
3-3-2 功率級單元和輸出匹配電路設計 98
3-3-3 輸入匹配電路設計 105
3-3-4 電路模擬與量測結果 108
3-3-5 結果比較與討論 115
第四章結論 117
4-1 總結 117
4-2 未來方向 118
參考文獻 119

參考文獻

[1] Samsung ′′6G Spectrum: Expanding the Frontier," pp.8-16, May 2022.
[2] C. Zhuang, Z. Peize and P. Sofie. "6G wireless communications in 7-24 GHz band: Opportunities, techniques, and challenges." arXiv preprint arXiv:2310.06425, 2023.
[3] Z. Wang, H. Wang and P. Heydari, “CMOS power-amplifier design perspectives for 6G wireless communications,” in Proc. IEEE Int. Midwest Symp. Circuits Syst. (MWSCAS), pp. 753–756, Aug. 2021.
[4] B. -H. Ku, S. -H. Baek and S. Hong, “A wideband transformer-coupled CMOS power amplifier for X-band multifunction chips,” IEEE Transactions on Microwave Theory and Techniques, vol. 59, no. 6, June 2011.
[5] Z. Ma and S. Mohammadi. "A reliable 5G stacked power amplifier in 45 nm CMOS technology," 2023 IEEE Topical Conference on RF/Microwave Power Amplifiers for Radio and Wireless Applications. IEEE, 2023.
[6] H. Alsuraisry, J. Cheng, S. Luo, W. Lin, J. Tsai and T. Huang, "A 24-GHz transformer-based stacked-FET power amplifier in 90-nm CMOS technology," 2015 Asia-Pacific Microwave Conference, Nanjing, China, 2015.
[7] Y. -C. Lee, T. -Y. Chen and J. Y. -C. Liu, "An adaptively biased stacked power amplifier without output matching network in 90-nm CMOS," IEEE International Microwave Symposium (IMS), pp. 1667-1690, June 2017.
[8] T. Kim, and C. Park, "Ka-band three-stacked CMOS power amplifier with LC shunt-feedback to enhance gain and stability," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 4, pp. 1969-1973, August 2009.
[9] T. Sadakiyo and H. Kanaya, "Development of highly efficient push-pull power amplifier with center tapped transformer for 5 GHz application," IEEE 19th Electronics Packaging Technology Conference (EPTC), Singapore, 2017, pp. 1-4.
[10] S. C. Cripps, RF Power Amplifiers for Wireless Communications, 2nd ed. Boston, MA: Artech, 2006.
[11] S. Pornpromlikit, J. Jeong, C. D. Presti, A. Scuderi and P. M. Asbeck, "A watt-level stacked-FET linear power amplifier in silicon-on-insulator CMOS," IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 1, pp. 57-64, Jan. 2010.
[12] J. A. Jayamon, J. F. Buckwalter and P. M. Asbeck, "Multigate-cell stacked FET design for millimeter-wave CMOS power amplifiers," IEEE Journal of Solid-State Circuits, vol. 51, no. 9, pp. 2027-2039, Sept. 2016.
[13] J. Park, S. Kang, S. Hong, "Design of a Ka-Band Cascode Power Amplifier Linearized With Cold-FET Interstage Matching Network, " IEEE Transactions on Microwave Theory and Techniques, vol. 69, no. 2, pp. 1429-1438, Dec. 2020.
[14] H. Jia, C. C. Prawoto, B. Chi, Z. Wang and C. P. Yue, "A full Ka-band power amplifier with 32.9% PAE and 15.3-dBm power in 65-nm CMOS," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 9, pp. 2657-2668, Sept. 2018.
[15] H. -F. Wu, Q. -F. Cheng, X. -G. Li and H. -P. Fu, "Analysis and design of an ultrabroadband stacked power amplifier in CMOS technology," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 1, pp. 49-53, Jan. 2016.
[16] F. Wang and H. Wang, "A broadband linear ultra-compact mm-wave power amplifier with distributed-balun output network: analysis and design," IEEE Journal of Solid-State Circuits, vol. 56, no. 8, pp. 2308-2323, Aug. 2021.
[17] S. Wong, S. Maisurah, M. N. Osman, F. Kung and J. See, "High efficiency CMOS power amplifier for 3 to 5 GHz ultra-wideband (UWB) application," IEEE Transactions on Consumer Electronics, vol. 55, no. 3, pp. 1546-1550, August 2009.
[18] P. Huang, Z. Tsai, K. Lin and H. Wang, "A high-efficiency, broadband CMOS power amplifier for cognitive radio applications," IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 12, pp. 3556-3565, Dec. 2010.
[19] B. Ku, S. Baek and S. Hong, "A wideband transformer-coupled CMOS power amplifier for X-band multifunction chips," IEEE Transactions on Microwave Theory and Techniques, vol. 59, no. 6, pp. 1599-1609, June 2011.
[20] T. Yao et al., "Algorithmic design of CMOS LNAs and PAs for 60-GHz radio," IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 1044-1057, May 2007.
[21] Behzab Razavi, "RF Micrielectronics, "Second Edition.
[22] S. A. Z. Murad, R. K. Pokharel, A. I. A. Galal, R. Sapawi, H. Kanaya and K. Yoshida, "An excellent gain flatness 3.0–7.0 GHz CMOS PA for UWB applications," IEEE Microwave and Wireless Components Letters, vol. 20, no. 9, pp. 510-512, Sept. 2010.
[23] V. Trinh, H. Nam and J. Park, "A 20.5-dBm X -Band Power Amplifier With a 1.2-V Supply in 65-nm CMOS Technology," in IEEE Microwave and Wireless Components Letters, vol. 29, no. 3, pp. 234-236, March 2019.doi: 10.1109/LMWC.2018.2885305
[24] S. C. Cripps, P. J. Tasker, A. L. Clarke, J. Lees, and J. Benedikt, "On the continuity of high efficiency modes in linear RF power amplifiers, " IEEE Microw. Wireless Compon. Lett., vol. 19, no. 10, pp. 665–667, Oct. 2009.
[25] Y. Dong, L. Mao and S. Xie, "Fully integrated class-J power amplifier in standard CMOS technology," IEEE Microwave and Wireless Components Letters, vol. 27, no. 1, pp. 64-66, Jan. 2017.
[26] S. Rezaei, L. Belostotski, F. M. Ghannouchi and P. Aflaki, "Integrated Design of a Class-J Power Amplifier," in IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 4, pp. 1639-1648, April 2013.
[27] K. K. Sessou and N. M. Neihart, "An integrated 700–1200-MHz class-F PA with tunable harmonic terminations in 0.13-μm CMOS," IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 4, pp. 1315-1323, April 2015.
[28] G. R. Nikandish, R. B. Staszewski and A. Zhu, "A Fully Integrated Reconfigurable Multimode Class-F2,3 GaN Power Amplifier," in IEEE Solid-State Circuits Letters, vol. 3, pp. 270-273, 2020.
[29] P. Wright, J. Lees, J. Benedikt, P. J. Tasker, and S. C. Cripps, "A methodology for realizing high efficiency class-J in a linear and broadband PA," IEEE Trans. Microwave Theory Techniques, vol. 57, no. 12, pp. 3196–3204, Dec. 2009.
[30] V. Carrubba et al., “The continuous class-F mode power amplifier,” in Proc. Eur. Microw. Conf., pp. 1674–1677., Sep. 2010.
[31] J. H. Kim, S. J. Lee, B. H. Park, S. H. Jang, J. H. Jung, and C. S. Park, “Analysis of high-efficiency power amplifier using second harmonic manipulation: Inverse class-F/J amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 8, pp. 2024–2036, Aug. 2011.
[32] J. -K. Nai, Y. -H. Hsiao, Y. Wang, F. Chen and H. Wang, "5-GHz transformer combined class-F−1 power amplifier, " in IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Taipei, Taiwan, 2016, pp. 1-3.
[33] 陳冠州，「應用於 n77 頻段之氮化鎵/砷化鎵積體被動元件多悌功率放大器暨使用 B 類連續技術於 C/Ka頻帶氮化鎵/砷化鎵功率放大器之研製」，國立中央大學，碩士論文，民國110年。
[34]羅時凱，「應用於第五代通訊之B類連續模式氮化鎵功率放大器暨互補式金氧半導體堆疊式功率放大器之研製」，國立中央大學，碩士論文，民國111年。

指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2024-8-14

推文