永磁同步馬達的實時硬體控制平台，使用基於觀測器之SDRE控制策略

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姓名

張正翰(Cheng-Han Chang) 查詢紙本館藏

畢業系所

機械工程學系

論文名稱

永磁同步馬達的實時硬體控制平台，使用基於觀測器之SDRE控制策略
(Real-Time Hardware Platform of Observer-Based Controller using the SDRE Scheme for Permanent Magnet Synchronous Motor)

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至系統瀏覽論文 ( 永不開放)

摘要(中)

本論文將狀態相關黎卡迪方程式(state-dependent Riccati equation, SDRE) 方案實時的應用於永磁同步馬達(permanent magnet synchronous motor, PMSM) 之扭力觀測器與馬達驅動系統之控制器設計與實現。有鑑於實際應用中電動車難以將扭力感測器裝設在馬達上，因此本論文採用了基於SDRE 方案的觀測器來估測負載扭矩，並且將估測的扭矩值使用於同樣基於SDRE 方案的PMSM 速度控制器中。SDRE 擁有計算每個時間點狀態的輸出，同時保留系統非線性特性，並且能對外界干擾具有強健性等能力，不過其長期被詬病且致命的缺點之一就是他的計算負擔。本論文透過等效降維的手法得以省去主要的計算負擔，也就是成功地移除任何不必要且繁瑣的使用SDRE 方案時的前置作業(適用性或可解性查驗)；換句話說，就是消去了每次求解SDRE 方案前的可解性檢測。除此之外，在次要的計算負擔方面，也就是求解SDRE 所造成的計算負擔，本論文將利用一種新穎的黎卡迪方程式求解器SDA (structure preserving doubling algorithm) 搭配FPGA (field programmable gate array) 來進行SDRE 運算的加速，藉此很大程度的降低了求解SDRE 時所造成的次要的計算負擔。另外，本論文更是進一步地設立了一個PMSM 硬體控制平台，以德州儀器的TMS320F28335 數位訊號處理器(DSP) 及馬達控制驅動器TMDSHVMTRPFCKIT 為基礎，透過串行外設介面(SPI) 通訊協定在FPGA 開發板(Ultra96-V2) 與DSP 之間進行溝通，並將其應用於動態模型中具有高度非線性特徵的內置式永磁同步馬達(IPMSM) 的實時SDRE 方案控制器上。

摘要(英)

This thesis applies the state-dependent Riccati equation (SDRE) scheme to the real-time hardware platform implementation of torque observer-based controller design for permanent magnet synchronous motor (PMSM). Given the practical difficulty of installing torque sensors on motors in electric vehicles, this thesis adopts an SDRE-based observer to estimate the load torque. The estimated torque is then used in an SDRE-based PMSM speed controller. SDRE has the ability to point-wisely compute the control outputs for each state while preserving the system’s nonlinear characteristics and remaining robust against external disturbances. However, there always exists a critical drawback of SDRE that is its computational burden. This thesis addresses this issue by employing an equivalent dimension reduction method, which eliminates the primary computational burden by successfully removing any unnecessary and complicated pre-processing tasks, which are its applicability and solvability checks, required when using the SDRE scheme. In other words, it eliminates the need for a solvability check before solving SDRE. Additionally, as for the secondary computational burden, i.e., the computational burden of solving the SDRE, this thesis introduces a state-of-the-art Riccati equation solver, SDA (structure-preserving doubling algorithm), implemented on a field-programmable gate array (FPGA) to accelerate SDRE computations, significantly reducing the secondary computational burden. Furthermore, this thesis develops the hardware platform for the experiment of the real-time SDRE controller for an interior permanent magnet synchronous motor (IPMSM), which has highly nonlinear characteristics in its dynamic model, based on a TI TMS320F28335 digital signal processor (DSP) and a motor control driver TMDSHVMTRPFCKIT, while the FPGA development board (Ultra96-V2) and DSP communicate with each other using the SPI (serial peripheral interface) protocol.

關鍵字(中)

★ 馬達硬體平台
★ SDRE
★ FPGA
★ SDA
★ SPI 通訊
★ 基於觀測器的控制器設計

關鍵字(英)

★ motor hardware platform
★ SDRE
★ FPGA
★ SDA
★ SPI communication
★ observer-based controller design

論文目次

摘要iv
Abstract vi
誌謝viii
目錄x
圖目錄xiii
表目錄xv
符號說明xvi
一、緒論1
1.1 研究動機.................................................................. 1
1.2 文章架構.................................................................. 7
二、問題描述8
2.1 State-Dependent Riccati Equation (SDRE) 方案.................... 8
2.2 PMSM 控制模型......................................................... 12
2.2.1 控制器設計...................................................... 13
2.2.2 觀測器設計...................................................... 14
三、系統硬體架構設計17
3.1 DSP 馬達驅動器......................................................... 19
3.1.1 數位訊號處理器................................................ 20
3.1.2 電源模組......................................................... 21
3.2 永磁同步馬達............................................................ 22
3.3 編碼器..................................................................... 24
3.4 動力計..................................................................... 25
3.4.1 煞車器............................................................ 26
3.4.2 扭力計............................................................ 28
3.5 FPGA 開發板............................................................. 29
3.6 SPI 通訊................................................................... 34
3.7 整合........................................................................ 38
四、實驗與結果分析41
4.1 轉速控制.................................................................. 41
4.2 FPGA 降低次要計算負擔.............................................. 46
4.2.1 實現SDA 演算法............................................... 46
4.2.2 不同求解方式之比較.......................................... 51
五、結論與未來展望56
5.1 結論........................................................................ 56
5.2 未來展望.................................................................. 57
參考文獻58

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指導教授

林立岡(Li-Gang Lin)

審核日期

2024-7-31

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