| 摘要(英) |
In recent years, digital circuits and baseband circuits in the receiver have entered the age of SoC (System-on-a-Chip). Owing to the characteristics of low cost and high integration, submicron CMOS technology provides a probability of SoC implementation for RF front-end. Thus, the submicron CMOS processes are of great demand for RF front-end. Power amplifiers are the important component in the RF Front-End. In a wireless system, a high efficiency power amplifier is attractive because it is the main source of power dissipation in the RF front-end. In these years, not only the capability to receive and transmit signals, but also time for stand by of the portable products in wireless communication have been taken into seriously account. To decrease the loss of heat, the power added efficiency (PAE) is the higher, the better. As the loss of energy decreases, the reliability of the transistors rises.
The Digital Terrestrial TV is not popular so far. However, digital TV will gradually replace analog TV in the coming years. The RF receiver deals with the signal received by antenna, that is, the RF receiver firstly handles the signal of digital TV. Besides the stations for transmission, the equipments for receiving signal are also important. Thus the circuits of digital TV receiver are quite significant.
The main researches in this thesis are the RF power amplifiers for WLAN applications and a wide-band low noise amplifier for DVB-T RF front-end receiver. The circuits in this thesis are implemented in tsmc 0.18um CMOS process.
In the section of PAs, measured linear gain of the 2.4GHz class A power amplifier is 8.8dB with output 1-dB compression point (P1dB) of 19.8dBm, and the measured power added efficiency (PAE) at P1dB is 12.8% with the input third interception point (IIP3) of 25dBm. The power amplifier with switched output power is originally designed for 2.4GHz applications but the operation frequency is turned into 1.2GHz after measurement. The measured linear gain is 7.4dB with output P1dB of 19.5dBm, and the measured PAE at P1dB is 17.9% with IIP3 of 21dBm for high output power mode; For low output power mode, linear gain is 7.3dB with output P1dB of 12.3dBm and PAE at P1dB is 4.3% with IIP3 of 22dBm. The measured results of high PAE power amplifier with a diode bias circuit are as follows: Operation frequency of 2.7GHz with power gain of 10.6dB. The output P1dB is 19.6dBm, and the measured PAE at P1dB is 17.5% with IIP3 of 23dBm. The wide-band low noise amplifier achieves at least gain of 7.4dB with noise figure lower than 4.3dB, and IIP3 is higher than 11dBm with the second input interception point (IIP2) higher than 34dBm. |
| 參考文獻 |
[2] S. C. Cripps, “RF Power Amplifiers for Wireless Communications” Artech House, 1999.
[3] T. H. Lee, “The Design of CMOS Radio-Frequency Integrated Circuits”, Cambridge University Press, 1998.
[4] T. Sowlati and D. M. W. Leenaerts, “A 2.4GHz 0.18um CMOS Self-Biased Cascode Power Amplifier”, IEEE Journal of Solid-State Circuits, vol.38, No.8, August 2003.
[5] C. C. Chu, “Design and Implementation of High-Efficiency 2.4GHz Class-E Power Amplifier MMICs and Modules”, Master Thesis, Department of Electrical Engineering, National Sun Yat-Sen University, July, 2003
[6] D. Y. C. Lie, P. Lee, J. D. Popp, J. F. Rowland, H. H. Ng and A. H. Yang, “The Limitations in Applying Analytic Design Equations for Optimal Class E RF Power Amplifier Design”, Department of Electrical and Computer Engineering, University of California, San Diego, La Jolla, CA
[7] W.C. Liu, “Implementation of RF Transceiver Front-End Circuits for ISM and Ka Band Applications”, Master Thesis, Department of Communication Engineering, National Central University, June, 2004
[8] B. Razavi, “Design of Analog CMOS Integrated Circuits”, McGraw-Hill International Editoon, 2001
[9] C. C. Yen and H. R. Chuang, “A 0.25um 20-dBm 2.4GHz CMOS Power Amplifier with an Integrated Diode Linearizer”, IEEE Microwave and Wireless Components Letters, vol.13. No. 2, February 2003
[10] Y. Ding and R. Harjani, “A CMOS High Efficiency +22dBm Linear Power Amplifier,” IEEE 2004 Custom Integrated Circuits Conference, pp.557-560, 2004.
[11] C. Wang, L. E. Larson and P. M. Asbeck, “A Nonlinear Capacitance Cancellation Technique and its Application to a CMOS Class AB Power Amplifier”, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp.39-42, 2001.
[12] 賴伯洲,林志星,魏明照,林世欽等編著;數位電視廣播與製作系統,全華科技圖書股份有限公司印行,民國91年
[13] John Norsworthy, Chief Technical Officer, Microtune, INC. Technical Backgrounder: “Tuners Serving Today’s High-Performance Broadband Applications Require Careful Attention To Key Performance Parameters”
[14] B. Razavi, “RF Microelectronics”, Prentice Hall, 1997
[15] 兆赫電子股份有限公司,ZDT-410HD DVB-T/HDTV Digital Terrestrial Receiver
[16] 泰山電子股份有限公司,數位地面接收機上盒,SE830-T
[17] 廣訊科技股份有限公司,數位電視機上盒,P-8000T
[18] 曹恆偉,李學智,陳銘憲,曾宏儒;數位電視無線資訊廣播平台之規劃及行動功能之研究, 執行單位:台灣大學電信中心; 委託機關:交通部, 民國91年12月31日
[19] John Norsworthy, Founder and Technical Officer, Microtune, INC. Technical Backgrounder: Single Chip Broadband Tuner
[20] Maxim Integrated Products, “MAX3558”: Quad-Output LNA with AGC for Cable TV Applications
[21] F. Bruccoleri, E. A. M. Klumperink and B. Nauta, “Generating All Two-MOS-Transistor Amplifiers Leads to New Wide-Band LNAs” , IEEE Journal of Solid-State Circuits, vol.36, No.7, July 2001 |
[Endnote RIS 格式]
[相關文章]
[文章引用]
[完整記錄]
[館藏目錄]
[檢視]
plurk
funp
live
udn
HD
myshare
netvibes
friend
youpush
delicious
baidu
Google bookmarks
del.icio.us
hemidemi
facebook
twitter
google
reddit