後矽電子之增強技術---子計畫五：絕緣層上鍺錫基板之製作及應用性質之研究; Fabrication and Applications of GeSn-on-Insulator Substrates

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題名:	後矽電子之增強技術---子計畫五：絕緣層上鍺錫基板之製作及應用性質之研究;Fabrication and Applications of GeSn-on-Insulator Substrates
作者:	李勝偉
貢獻者:	材料科學與工程研究所
關鍵詞:	超高真空化學氣相沉積法;矽鍺合金;絕緣層上矽鍺;金屬鍺化物;蕭基能障二極體;ultra-high vacuum chemical vapor deposition;SiGe;SGOI;metal germanide;Schottky barrier diode;電子電機工程類
日期:	2010-08-01
上傳時間:	2010-05-28 15:14:58 (UTC+8)
出版者:	行政院國家科學委員會
摘要:	矽半導體產業自發展至今30餘年來始終遵循著莫爾定律，但隨著矽基電子元件尺寸微縮進入奈米世代，導入新材料以增進元件運作效能便成為十分重要的課題。近年來，絕緣層上矽鍺(SGOI)基板因同時結合了高載子移動率材料與絕緣層上覆矽(SOI)結構等優點而受到廣泛且深入的研究。其中以絕緣層上矽鍺基板所製作的形變矽金氧半電晶體 (strained-Si MOSFET)已被成功驗證，其形變矽通道之載子移動率隨著形變矽磊晶層的拉伸應變程度而增加，而形變矽內的拉伸應力大小則主要由基板鍺含量所決定。此外，高鍺成分的矽鍺半導體因具有較窄的能隙寬度與較大的吸收係數，亦是製作紅外線偵測器的適合材料。因此絕緣層上覆鍺(GOI)基板在未來整合矽基光電元件與高速積體電路上將扮演相當重要的角色，然而製作高品質的絕緣層上覆鍺基板仍存在許多的挑戰。過去幾年，已有幾項關於絕緣層上矽鍺基板的製作方式被提出，包括了晶圓接合 (wafer bonding)、融熔固化(melt solidification)與氧佈植隔絕(SIMOX)等。但由於高鍺成分會造成高溫氧化時熔點過低，使得氧佈植隔絕技術無法得到鍺含量超過14%的絕緣層上矽鍺基板，另外晶圓接合技術則因製程複雜度高且表面粗造度大而受限。因此延續本人之前在製作絕緣層上矽鍺基板的研究成果，本計劃將提出兩種利用鍺濃縮技術製作高品質絕緣層上覆鍺基板的方案，並深入探討絕緣層上覆鍺基板上有限的鍺厚度及殘留矽含量對於金屬鍺化物相轉變及熱穩定性的影響。由於鍺錫合金有更大的晶格常數，更加擴展鍺材料的應用性，因此有需要對絕緣層上鍺錫(GSOI)基板的基本材料性質作深入的研究。本計劃將利用鍺濃縮技術及離子佈植錫兩種方式形成絕緣層上鍺錫基板，除了深入研究絕緣層上鍺錫基板的微結構與其應變性質外，更進一步探討錫成份對於金屬鍺化物之相轉變、顯微結構及電學性質的影響，最後以絕緣層上鍺錫基板製作金屬鍺化物蕭基能障二極體(Schottky barrier diode)，量測其蕭基能障高度以及探討其光電流效應。由於本研究計畫與現有矽製程技術高度相容，因此相關的研究成果將成為未來鍺基高速電子元件與光電元件相互整合時的重要參考。 In an attempt to maintain the scaling trend of CMOS circuits in accordance with Moore’s law and to achieve continuous performance improvements, it is suitable to introduce many new materials. Among them, SiGe-on-insulator (SGOI) substrates have attracted intensive research interest as they combine the merits of high mobility channel materials and semiconductor-on-insulator structure. The mobility in strained-Si MOSFETs using SGOI substrates increases with an increase in strain which is determined by the Ge content of SiGe layer. In addition, high Ge content SiGe is also a suitable material for infrared photo-detectors since it has a narrow band gap with a much larger absorption coefficient in the infrared region than that on Si. Therefore, Ge-on-insulator (GOI) substrates are required for the integration of optoelectronic integrated circuits (OEICs) on Si-based high-speed devices. However, the fabrication of GOI substrates remains a challenging task. Several ways of fabricating SGOI structures have been reported, including wafer bonding, intermixing, and separation by implanted oxygen (SIMOX). However, the process of SIMOX is not suitable for SGOI fabrication with a Ge concentration higher than 30%. The wafer bonding technique to form GOI is limited by its process complexity and surface roughness. In this project, two schemes are proposed to fabricate the high-quality GOI substrates by means of Ge-condensation technique. In addition, the formation and thermal stability of metal germanide formed on those Ge-limited GOI substrates will be investigated. Since GeSn alloys can provide a larger lattice mismatch with respect to Ge, it is desirable to investigate the material structures and strain characteristics of GeSn-on-insulator (GSOI) substrates. In this project, GSOI substrates are formed by the condensation process or by employing ion implantation of Sn in GOI substrates. The research will be conducted to examine the crystallographic, morphological, and mechanical properties of GSOI substrates that are critical to their applications. Furthermore, the influences of the presence of Sn on the microstructures and electrical properties of metal germanide will be investigated. Finally, metal-germanide Schottky barrier diodes on GSOI substrates will be fabricated and their Schottky barrier heights and photocurrent effects will be analyzed. These related results will provide useful information for fabricating high-quality GSOI substrates and then integrating SiGe-based high-speed devices on GSOI substrates. 研究期間：9908 ~ 10007
關聯:	財團法人國家實驗研究院科技政策研究與資訊中心
顯示於類別:	[材料科學與工程研究所 ] 研究計畫

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