薄膜電性效應對等離子體注入之影響研究; The Effect of The Thin Film Electric Characteristic for Plasma Immersion Ion Implantation

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题名:	薄膜電性效應對等離子體注入之影響研究;The Effect of The Thin Film Electric Characteristic for Plasma Immersion Ion Implantation
作者:	林宛蓉;Wan-jung Lin
贡献者:	機械工程研究所
关键词:	電漿浸沒離子佈植;離子佈植;絕緣層矽晶;silicon on insulator;plasma immersion ion implantation;ion implantation
日期:	2008-06-11
上传时间:	2009-09-21 12:01:38 (UTC+8)
出版者:	國立中央大學圖書館
摘要:	一般製作高品質的SOI 薄膜技術，通常是以離子佈植技術結合晶圓鍵合的智切法，但由於離子佈植技術具有單方向(line-of-sight)離子佈植限制，且又因離子束的截面積很小，佈植時需耗費較多掃瞄時間，造成佈植時間較長，產能較低，又加上設備昂貴等缺點。因此，本論文主要目的是利用電漿浸沒離子佈植技術 ( Plasma immersion ion implantation ，PIII )取代離子佈植技術。而PIII 的缺點是缺少質量分析器和佈植環境低真空度，因此，雜質的存在是PIII 面臨到最大的難題。為了改善這些缺陷，本實驗在氧化層上方成長一多晶矽層，作為阻擋雜質的犧牲層，已成功地克服雜質的問題。另外利用多晶矽摻雜的方式，改變薄膜電性，藉由薄膜電性的改變以增加氫離子植入矽中的數量。本論文中主要也會針對薄膜電性對電漿離子植入之影響作一深入的探討與研究。 It’s a well known in the art to produce the high quality silicon layer of SOI wafer by Smart-Cut® technology. However, the conventional ion implantation in Smart-Cut® process, a line-of-sight beam, which has a small cross-sectional area causes long implantation time, low throughput and expensive equipment-cost. Therefore, the main purpose of this study is to use plasma immersion ion implantation (PIII) in the ion implantation step. Due to the absence of a mass spectrometer and the non-UHV environment, the presence of impurities during implantation becomes the maim problem of applying PIII technology. In order to minimize the impurity concentration, it is deposited a sacrificial polycrystalline silicon (poly-Si) layer above the silicon oxide layer. According to the experimental results, the polycrystalline silicon layer can reduce those problems of impurities successfully. The second topic of this study is to dope the poly-Si layer and utility the electric characteristics of it for increasing the amount of implanted hydrogen ions. This study also confers to the effects in PIII made by the electric characteristic of poly-Si layer.
显示于类别:	[機械工程研究所] 博碩士論文

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