多孔矽薄膜轉移之研究; The study of porous silicon thin-film transfer

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Title:	多孔矽薄膜轉移之研究;The study of porous silicon thin-film transfer
Authors:	陳凱傑;Kai-Jie Chen
Contributors:	機械工程研究所
Keywords:	多孔矽;電化學蝕刻;絕緣層矽晶;晶圓鍵合;薄膜轉移;退火;Silicon on insulator;Electrochemical etching;Porous Silicon;Wafer bonding;Annealing;Thin-film transfer
Date:	2011-06-14
Issue Date:	2012-01-05 12:27:41 (UTC+8)
Abstract:	在半導體製程技術中，依循著摩耳定律（Moore，s Low）前進。隨著時代的發展，半導體產業製程技術已進入奈米製程。由於元件尺寸越做越小，在傳統矽塊材（Bulk Silicon）晶圓材料會衍生出許的問題，如：寄生效應、閉鎖效應、軟錯效應、基材漏電流與過熱…等問題，利用製作絕緣層矽晶（Silicon on insulator, SOI）材料結構可以解決以上這些問題。目前常見製作絕緣層矽晶材料的方法為Smart-Cut®製程，利用高劑量氫離子佈植於矽晶圓內，再經晶圓鍵合製程與高溫退火處理，使氫離子聚集產生裂縫剝離以達到薄膜轉移之目的。由於Smart-Cut®製程中離子佈植機設備高昂，使用高強度離子束容易損傷晶圓，且佈植深度難以超過一微米，故利用電化學蝕刻的方式，可以製作出厚層之薄膜轉移，又能大幅降低成本。本研究之目的為使用電化學蝕刻的方式，依照不同蝕刻參數，以電化學蝕刻P型重掺雜矽晶圓，蝕刻出雙層多孔矽，再與已另一片生成二氧化矽之矽晶圓鍵合，利用高溫退火，製作出深埋破裂層與微米厚的多孔回復晶矽薄膜。多孔回復晶矽薄膜可沿著深埋破裂層施以應力而產生剝離，達到薄膜轉移之目的，所形成薄膜厚度約為3〜10微米，此方法結合晶圓鍵合可以製作厚膜絕緣層矽晶（SOI）材料。 In the semiconductor manufacturing technology which follows the Moor's law in the past. The development of the semiconductor industry has entered the nanoscale processes. As the size of devices are manufactured to be much smaller, some problems come up with the use of traditional silicon bulk wafer material, such as the parasitic capacitance, latch-up, short channel effects, the substrate leakage current and overheating ,and so on. These problems can be solved by using silicon on insulator material structure. Smart-Cut® process is a common technology for manufacturing the SOI material. By implanting the high doses of hydrogen ion into the silicon wafer, wafer bonding process and annealing process, the hydrogen ions will accumulate and thus create cracks to finish thin film transfer. Due to expensive ions implantation equipment which is easy to cause damage because of high ion implanting doses into silicon wafer. It’s difficult to obtain over 1 micron of implanting depth. Thus, electrochemical etching method can achieve thicker film transfer and the price is cheaper. The purpose of this study is to use electrochemical etching method, heavily doped P-type silicon wafer was electrochemically etched based on different etching parameters which forms a porous silicon (PS) bilayer. Then bonding porous silicon (PS) bilayer with a silicon specimen covered with thermal oxide layer. The porous silicon (PS) bilayer with a buried separation layer and recrystallization layer with a few microns thickness has been finished through high temperature annealing and can be split when a stress is applied on buried separation layer to achieve the film transfer, the transfered film thickness is about 3 to 10 microns which provides another process to fabricate SOI material.
Appears in Collections:	[Graduate Institute of Mechanical Engineering] Electronic Thesis & Dissertation

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