English  |  正體中文  |  简体中文  |  Items with full text/Total items : 65421/65421 (100%)
Visitors : 22330511      Online Users : 396
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version


    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/51929


    Title: Design and Analysis of High-Throughput Lossless Image Compression Engine Using VLSI-Oriented FELICS Algorithm
    Authors: Tsai,TH;Lee,YH;Lee,YY
    Contributors: 電機工程學系
    Date: 2010
    Issue Date: 2012-03-28 10:10:42 (UTC+8)
    Publisher: 國立中央大學
    Abstract: In this paper, the VLSI-oriented fast, efficient, lossless image compression system (FELICS) algorithm, which consists of simplified adjusted binary code and Golomb-Rice code with storage-less parameter selection, is proposed to provide the lossless compression method for high-throughput applications. The simplified adjusted binary code reduces the number of arithmetic operation and improves processing speed. According to theoretical analysis, the storage-less parameter selection applies a fixed value in Golomb-Rice code to remove data dependency and extra storage for cumulation table. Besides, the color difference preprocessing is also proposed to improve coding efficiency with simple arithmetic operation. Based on VLSI-oriented FELICS algorithm, the proposed hardware architecture features compactly regular data flow, and two-level parallelism with four-stage pipelining is adopted as the framework of the proposed architecture. The chip is fabricated in TSMC 0.13-mu m 1P8M CMOS technology with Artisan cell library. Experiment results reveal that the proposed architecture presents superior performance in parallelism-efficiency and power-efficiency compared with other existing works, which characterize high-speed lossless compression. The maximum throughput can achieve 4.36 Gb/s. Regarding high definition (HD) display applications, our encoding capability can achieve a high-quality specification of full-HD 1080p at 60 Hz with complete red, green, blue color components. Furthermore, with the configuration as the multilevel parallelism, the proposed architecture can be applied to the advanced HD display specifications, which demand huge requirement of throughput.
    Relation: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
    Appears in Collections:[電機工程學系] 期刊論文

    Files in This Item:

    File Description SizeFormat
    index.html0KbHTML195View/Open


    All items in NCUIR are protected by copyright, with all rights reserved.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - Feedback  - 隱私權政策聲明