Reliability-Enhancement and Self-Repair Schemes for SRAMs With Static and Dynamic Faults

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题名:	Reliability-Enhancement and Self-Repair Schemes for SRAMs With Static and Dynamic Faults
作者:	Li,JF;Tseng,TW;Hou,CS
贡献者:	電機工程學系
关键词:	INFRASTRUCTURE IP;MEMORIES;RAMS;REDUNDANCY;DESIGN;YIELD;MODEL
日期:	2010
上传时间:	2012-03-28 10:12:31 (UTC+8)
出版者:	國立中央大學
摘要:	This paper proposes a simple method for enhancing the reliability of static random access memories (SRAMs) with hard-to-detect resistive-open defects. The method prevents a SRAM from executing successive multiple read operations on the same position, such that the hard-to-detect defects cannot manifest as functional faults. This can prolong the lifetime of the SRAM with latent hard-to-detect defects. Experimental results show that the proposed reliability-enhancement circuit (REC) can effectively improve the reliability of the SRAMs without incurring delay penalty and with 0.07% additional area cost for an 8192 x 64-bit SRAM. By integrating the REC with the SRAM, a BISR scheme is proposed to boost 6%-10% increment of repair rate compared with the BISR without the REC. Also, the area cost of the BISR is low-only about 2% for an 8192 x 64-bit SRAM.
關聯:	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
显示于类别:	[電機工程學系] 期刊論文

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