Design and Analysis of a 77.3% Locking-Range Divide-by-4 Frequency Divider

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題名:	Design and Analysis of a 77.3% Locking-Range Divide-by-4 Frequency Divider
作者:	Kuo,YH;Tsai,JH;Chang,HY;Huang,TW
貢獻者:	電機工程學系
日期:	2011
上傳時間:	2012-03-28 10:14:03 (UTC+8)
出版者:	國立中央大學
摘要:	A cascoded frequency divider (FD) with division number of 4 and ultra-wide locking range is presented in this paper. The proposed FD consists of a divide-by-2 (D2) injection-locked frequency divider (ILFD) core and a D2 source-injection current mode logic (SICML) divider. After the cascoded integration of ILFD and SICML, the removal of transconductance and buffer stages can lower the dc power consumption and widen the locking range. The proposed FD is implemented in 0.13-mu m CMOS technology and has a 77.3% frequency locking range from 13.5 to 30.5 GHz at injection power of 0 dBm while consuming 7.3-mW dc power. Compared to the previously reported ILFDs, the proposed circuit achieves the widest locking range without employing extra tuning mechanism.
關聯:	IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
顯示於類別:	[電機工程學系] 期刊論文

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