Hybrid Testbench Acceleration for Reducing Communication Overhead

NCUIR > College of Electrical Engineering & Computer Science > Department of Electrical Engineering > journal & Dissertation > Item 987654321/52075

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Title:	Hybrid Testbench Acceleration for Reducing Communication Overhead
Authors:	Chuang,CL;Liu,CN
Contributors:	電機工程學系
Date:	2011
Issue Date:	2012-03-28 10:14:49 (UTC+8)
Publisher:	國立中央大學
Abstract:	Hybrid embedded testbench acceleration (HETA), a new approach to reduce communication overhead in hardware accelerators, speeds up simulation of chip prototypes by avoiding the communication between hardware and software. Experimental results on an industry design show that the proposed HETA approach is about 10 times faster than a commercial hardware accelerator and with only 0.57% hardware overhead.
Relation:	IEEE DESIGN & TEST OF COMPUTERS
Appears in Collections:	[Department of Electrical Engineering] journal & Dissertation

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