Symmetric Offset Stack Balun in Standard 0.13-mu m CMOS Technology for Three Broadband and Low-Loss Balanced Passive Mixer Designs

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題名:	Symmetric Offset Stack Balun in Standard 0.13-mu m CMOS Technology for Three Broadband and Low-Loss Balanced Passive Mixer Designs
作者:	Chiou,HK;Lin,JY
貢獻者:	電機工程學系
關鍵詞:	RESISTIVE MIXER;MARCHAND BALUN;IF BALUN;MINIATURE
日期:	2011
上傳時間:	2012-03-28 10:15:36 (UTC+8)
出版者:	國立中央大學
摘要:	This paper presents symmetric offset stack Marchand single and dual baluns that are designed, analyzed, and implemented in a 0.18-mu m CMOS process to verify the feasibility. Both single and dual baluns achieve measured bandwidths (BWs) of over 110% and 90%, and insertion losses of less than 4.4 and 7.4 dB at 38 GHz. The amplitude imbalance and phase imbalance of single and dual baluns are less than 1 dB and 5 degrees from 10 to 67 and 11 to 50 GHz, respectively. The baluns were used in three broadband balanced passive mixers, i.e., a single-balanced resistive mixer (SBRM), a star mixer, and a subharmonic gate pumped resistive mixer (SHPRM) design in a 0.13-mu m CMOS technology. These mixers exhibit wide BWs over 14-45 GHz (105%), 18-54 GHz (100%), and 28-50 GHz (56%). The 14-45-GHz SBRM achieves a conversion loss of better than 12 dB at 7 dBm of local oscillator (LO) power. The LO to RF and LO to IF isolations are better than 30 dB. The chip area is 0.53 mm(2). The star mixer achieves a conversion loss of better than 12 dB from 18 to 54 GHz, and LO to RF, LO to IF, and RF to IF isolations better than 35 dB at LO frequencies spanning 10-60 GHz. The chip area is 0.6 mm(2). The SHPRM has a conversion loss of better than 11 dB from 28 to 50 GHz. The isolations are better than 31 dB and occupy a chip area of 0.61 mm(2).
關聯:	IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
顯示於類別:	[電機工程學系] 期刊論文

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