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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/54176


    Title: 具45˚矽基反射面高分子聚合物波導之10-Gbps晶片內部光學連接收發模;Intra-chip 10-Gbps Optical interconnect Module Using Polymer Waveguide with Silicon-Base 45˚Micro-Reflector
    Authors: 梁凱;Liang,Kai
    Contributors: 光電科學研究所
    Keywords: 高分子聚合物波導;45˚矽基反射面;光連接;晶片內;polymer waveguide;optical interconnect;intra-chip
    Date: 2012-07-17
    Issue Date: 2012-09-11 18:38:56 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 本研究提出一個具45°反射面高分子聚合物波導之10-Gbps 晶片內部光學連接收發模組,此技術可應用於晶片上光學訊號傳遞。在架構上藉由一個具光學品質的矽基45°反射面,利用波長為850 nm的面射型雷射進入高分子聚合物波導經45°反射面轉折進入光檢測器。此模組包含45°反射面、高分子聚合物波導、高頻傳輸線、銀銦焊料、850 nm面射型雷射與光檢測器。  本研究完成具45°反射面之高分子聚合物波導收發模組之光學模擬、製程以及量測結果;而量測包含了波導光路與模組之光學特性、高頻傳輸線特性、主動元件特性和收發模組之眼圖。在光學方面,高分子聚合物波導的傳遞損耗為 -0.353 dB/cm、45˚反射面之轉折損耗則是 -0.4325 dB,而整個模組的光學耦合效率為 -2.798 dB,由此可證明此模組在晶片上的應用是確實可行的。  在模組的高頻特性方面,在操作電流為8 mA下訊號以10-Gbps的傳輸速率時,其光檢測器所接收到的光電流為0.632 mA,模組在沒有加IC的情況下,眼圖眼高為16 mV、抖動為24.77 ps、訊雜比可達7.29,此外,本模組可同時驅動4通道 × 10Gbps,其眼圖量測皆在傳輸10-Gbps的標準之上,從實驗數據驗證了我們提出的晶片內部光連接模組在可在低功耗下處理10-Gbps的訊號傳輸。In this thesis, we propose an intra-chip 10-Gbps optical interconnect module using a silicon optical bench (SiOB) integrated with polymer waveguides and silicon-based 45˚ micro-reflectors. In the module, a 850-nm vertical-cavity-surface-emitted-laser (VCSEL) array and a photo-detector array are assembled on the proposed SiOB using Ag/In solder bumps. The 10-Gbps data is operated using the transmission lines plated on the SiOB. The laser beam emitting from the VCSEL array is coupled into the polymer waveguide via a silicon 45˚micro-reflector at the input port. At the output port, the laser beam is coupled out SiOB via another silicon 45˚ micro-reflector.  In the fabricated polymer waveguide, it propagation loss of -0.353 dB/cm, the bending loss of -0.4325 dB per 45˚micro-reflector are measured. The insertion loss of whole polymer waveguide with an optical length of 0.5 cm in the proposed module is -2.798 dB. It demonstrates that the polymer waveguide with Si-based 45˚reflector in the module is practicable for on-chip applications.   In the fabricated module, the measurement of high-frequency characteristic is show as follow. As the VCSEL array is biased at 8 mA, without IC at the module, the clear eye diagram with an eye high of 16 mV, a jitter of 24.77 ps, and the signal-to-noise ratio of 7.29 is demonstrated at the data rate of 10 Gbps. The experiment data verifies the proposed intra-chip module can be operated at 10 Gbps with a low power consumption.
    Appears in Collections:[Graduate Institute of Optics and Photonics] Electronic Thesis & Dissertation

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