Electronic design automation (EDA)[1] 是供硬體開發人員用來設計積體電路(Integrated circuit, IC[2]) 的一系列軟體工具。隨著積體電路越趨龐大與複雜化，需要更有效率的方式來幫助硬體開發人員來完成IC 的設計，而EDA 這樣的軟體工具對於硬體開發人員也越來越重要。硬體開發人員使用EDA 軟體工具來加速IC 的設計與硬體的開發。而這些EDA 軟體工具的則是由EDA 公司內的軟體開發人員負責設計與開發。本論文著眼於幫助開發EDA 軟體工具的軟體開發人員進行除錯。軟體開發人員於開發 EDA 軟體工具時，常常要面對複雜的資料結構，而這些複雜的資料結構加深了軟體開發人員在程式除錯時的困難。使用除錯器下中斷點來觀察變數或資料結構的方式，對於EDA 軟體開發人員在除錯時的幫助有限。EDA 的軟體開發人員會希望程式停在某個中斷點時，視覺化某一群複雜的資料結構，並且從視覺化的過程中對應至程式內原本他所關心的資料結構。本論文使用 xDIVA (Debugging Information Visualization Assistant)[3] 來幫助 EDA軟體開發人員加速軟體除錯的過程。 xDIVA 使用3D 的圖形、顏色和動畫來視覺化除錯的資訊，程式開發人員可以依據自己的想法來處理除錯資訊與視覺化之間的對應關係，將資訊視覺化成有意義的3D 圖像。透過使用 xDIVA，EDA 軟體開發人員可以將複雜的IC layout 資料結構轉換成3D 空間內的 polygon。藉由觀察 3D 空間內的物件與其變化，來找出程式謬誤之處。Since IC (Integrated Circuit) becomes more and more complex, hardware engineers needmore powerful computer-aided tools to help them develop IC. These tools are calledElectronic design automation (EDA) tools, which are complicated software systems that dealwith different problems in several stages in IC manufacturing. Our research provides amechanism to help EDA Software programmers find debugs more easily.EDA tool programmers often deal with complex data structures, and these complex datastructures make program very difficult to debug. Although debuggers are still the mostimportant debugging tools for EDA tool programmers, they are quite limited in many aspects.More powerful visual debugging tools are needed in this area.In this thesis, we enhance xDIVA (eXtreme Debugging Information VisualizationAssistant) to help EDA developers speed up the debugging process. xDIVA uses 3D graphs,color and animation to visualize debugging information. Developers can configure 3Ddebugging visualization by xDIVA to suit their needs. We show that xDIVA can map complexIC layout data structures into 3D polygons and problems of a program can be easily checkedfrom such a visualization aid.
