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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/61445


    題名: 利用三維矽波導光路實現10-Gbps單晶片光學連接模組;On-Chip 10-Gbps Optical Interconnect Module Using Three-Dimensional Silicon Optical Waveguides
    作者: 張家豪;ZHANG,JIA-HAO
    貢獻者: 光電科學與工程學系
    關鍵詞: 光連接模組;單晶片;波導;optical interconnect module;on chip;waveguides
    日期: 2013-08-05
    上傳時間: 2013-10-08 15:12:19 (UTC+8)
    出版者: 國立中央大學
    摘要: 在目前多核心架構下,核心與核心之間的連接需要高傳輸量的介面,而晶片上之光連接模組是能夠提供大資料傳輸的解決方法,於是在本研究中提出利用三維矽波導光路實現10-Gbps單晶片光學連接模組。此模組整合了主動元件雷射、光偵測器、驅動電路晶片以及矽波導於一個矽基板上,使用者只需要調制驅動電路晶片而不需要考慮光電介面轉換的問題。
    在本論文中訊號的傳遞路徑依序是:驅動端積體電路晶片、面射型雷射、45°微反射面、矽波導、45°微反射面、光偵測器、接收端放大器電路晶片,此訊號由雷射出發之後,經由45°微反射面達到光路垂直轉折之目的,耦合進入矽波導中,再經由另一個45°微反射面垂直轉折進入光偵測器,實現三維光路之架構。本光學連接模組使用SOI晶圓當作基板,在光子元件層使用非等向性濕蝕刻製程一次步驟製作出光波導以及45°微反射面,接著在絕緣層上建構高頻傳輸線以及封裝上主動元件,最後利用打線的方式整合積體電路晶片於發射與接收端。
    本光學連接模組之光學損耗經過量測可達2.22 dB,在高頻的量測初使條件:雷射由驅動電路供給電流10 mA、出光功率是1.82 mW、調制電流12.5 mA,放大器電路供給光偵測器1.7 V負偏壓,偽隨機二進位序列為2-31-1;量測到眼圖之眼高可達218 mV、訊雜比24、抖動為30.22 ps、誤碼率可以通過10-12等級。由此可證明本模組具有傳輸10-Gbps資料量的能力
    Due to the new semiconductor technologies such as multi-core processors are more popular, the interface to transmitting high data rate of core-to-core interconnect is important. On-chip interconnect module is the solution to overcome the high data rate demand in next generation. Here, we demonstrate an on-chip 10-Gbps optical interconnect module using three-dimensional silicon optical waveguides. This optical module include the vertical-cavity surface-emitting laser (VESEL), driver IC, amplifier IC, photodiode (PD), all integrated in the one silicon substrate. The system is optically complete and closed without any optical inputs or outputs, users do not have to worry about any optical issues, could only control the driver IC to operate the system.
    In this thesis, we use the 45° micro-reflector to achieve three-dimensional optical path. Signal transmission path is showed below, controlling driver IC to generate electric signal for VESEL, VESEL convert signal from electrical to optical, and the laser beam emitting from the VCSEL array is coupled into the waveguide via a 45° micro-reflector, propagates along the waveguide, and then is coupled into the PD via another 45° micro-reflector, finally the signal converted from optical to electrical and arrived to the amplifier. Proposed on-chip 10-Gbps optical interconnect module is based on SOI wafer. The 45° slants and proposed waveguide are fabricated on the device layer of (100)-oriented SOI wafer using anisotropic wet etching. The VESEL, PD, driver IC, amplifier are assembled on the isolation layer and connect the PCB by wire bonding.
    According to the optical simulated and experiment results, optical loss achieve 2.22 dB. Initial condition for high-frequency measurement : Driver IC supply 10 mA driver current to VCSEL, modulation current is 12.5 mA, output power is 1.82 mW. Amplifier supply -1.7 voltage to PD. Delivering a 2-31-1 PRBS signal at 10-Gbps at wavelength of 1310 nm. Finally we get a eye diagram for the data rate at 10-Gbps. The eye height is 218 mV, signal to noise Ratio (SNR) is 24, jitter is 30.22 ps, the eye is wide open with a BER < 10-12, indicating a good transmission capability.
    顯示於類別:[光電科學研究所] 博碩士論文

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