相機變形校正晶片與系統的設計與實作; Design and Implementation of a Camera Distortion Correction System and Chip

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題名:	相機變形校正晶片與系統的設計與實作;Design and Implementation of a Camera Distortion Correction System and Chip
作者:	姚敦凱;YAO,TUN-KAI
貢獻者:	資訊工程學系
關鍵詞:	廣角鏡頭;變形校正;相機;wide-angle lens;distortion correction;camera
日期:	2013-10-07
上傳時間:	2013-11-27 11:32:51 (UTC+8)
出版者:	國立中央大學
摘要:	本論文提出一個使用輕量化的類神經相機變形模型與虛擬校正技術的高效率的相機變形校正方法，針對低價與低品質的廣角鏡頭做精確的變形校正。有別於傳統針對廣角變形的理想放射狀多項式模型。類神經逆映射方法使用非線性建模的方式，同時擬合各種在低價相機上的變形，包括；多鏡片疊合、廣角變形、製造工差等等光學變形。提出的方法使用一個輕型的單層前饋式類神經網路，並使用倒傳遞錯誤修正的訓練方法，擬合複雜的相機變形曲面。透過最佳化過的變形校正資訊，僅使用 4 個神經元的單隱藏層的神經網路，就能精確的映射變形影像空間與校正影像空間的資訊。所提出的類神經相機變形模型同時使用了兩種不同角度的低價廣角鏡頭來驗證校正精確度，並比較傳統的數學廣角變形校正模型；而結果表示，使用提出的方法校正 120 度廣角相機所取得的變形影像，校正誤差低於 2 像素，同時整張影像的均方誤差僅有 0.2050。相較於傳統多項式方法能夠提升超過 429 倍的精確度。並根據所提出的類神經方法的基礎上，提出一個硬體加速器架構；在 28nm FPGA 上，類神經加速器可以操作在超過 100Mhz 的時脈，可以校正超過 Full HD 解析度的低品質 120 度廣角相機影像。而使用台積電 90 奈米製程合成所提出的硬體架構，所提出的硬體架構可以工作在超過 300Mhz 的時脈。最後，使用整數運算的晶片電路與理想使用浮點數的軟體程式的輸出誤差低於 10 的-6 次方；工作在 240MHz 時，可以即時校正每秒 30 張 4K2K 解析度的影像。 This study proposes a rapid neural network-based camera distortion correction (NCDC), based on a lightweight neural network, to accurately correct the distortion of low-cost cameras. The NCDC is different from general camera distortion models because it uses a neural network to simultaneously model numerous camera distortions, including multi-lens and wide-angle distortion, as well as various manufacturing flaws, in a low-cost camera. The proposed NCDC uses a neural network with an error backpropagation training algorithm to map the complex distortion surface. The optimal number of neurons was assigned as 4 to associate the mapping model between the distortion image space and the correction image space. In offline calibration processing, the NCDC calculates the distortion vector from a single captured calibration image without requiring an estimation of the optical center. Two different wide-angle lenses use the proposed neuron-base method to correct the distortion. Results show that the maximal corrected error in a whole image is less than 2 pixels with 120° wide-angle lens, and that the mean square error (MSE) approaches 0.2050 between the corrected and ideal results. The NCDC is 429x more accurate than the traditional polynomial method. Simultaneously, this study proposes a VLSI architecture bases on the NCDC, and built a verification system of FPGA that consists of microprocessor, bus, memory, GbE and wide-angle camera to really capture a distortion image, and correct the camera distortions. The neural network-based corrector can correct an over 1920x1080 resolution image from the low-price 120° wide-angle camera. To obtain a more accurate correction, the neural network-based correction method was implemented using a 24-bit fixed point, after which the difference in error between the floating point in the software and the fixed point in the hardware was under 10 -6 . The NCDC chip is sized 1.51  1.51 mm 2 , and contains 126K gates built using TSMC 90 nm CMOS technology. Working at 240 Mhz, this architecture can correct 30 frames of 4K2K-resolution video per second.
顯示於類別:	[資訊工程研究所] 博碩士論文

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