以噴塗技術沉積有機半導體薄膜：形貌分析及其於有機場效應電晶體元件應用;Spray Coating Organic Semiconducting Thin Film: Morphology Analysis and Organic Field Effect Transistors Application

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題名:	以噴塗技術沉積有機半導體薄膜：形貌分析及其於有機場效應電晶體元件應用;Spray Coating Organic Semiconducting Thin Film: Morphology Analysis and Organic Field Effect Transistors Application
作者:	許瀚文;Hsu,Han-wen
貢獻者:	化學工程與材料工程學系
關鍵詞:	噴塗;有機場效應電晶體;有機薄膜電晶體;共軛高分子半導體;有機小分子半導體;溶液法製程;spray coating;organic field effect transistors;organic thin film transistors;conjugated polymers;small molecular semiconductors;solution process
日期:	2015-07-27
上傳時間:	2015-09-23 10:46:53 (UTC+8)
出版者:	國立中央大學
摘要:	本研究使用噴塗(spray-coating)技術沉積 poly[(9,9-dioctylfluorenyl-2,7 -diyl)-co-bithiophene] (F8T2)共軛高分子、6,13-bis(triisopropylsilylethynyl) -pentacene (TIPS-PEN)有機小分子以及poly-(selenophene-alt-3,6-dithophene -2-yl-2,5-bis-(2-hexyldecyl)-2,5-dihydro-pyrrolo[3,4-c]pyrrole-1,4-dione) (PSeDPP)共軛高分子作為有機半導體材料，製作於以矽烷(silane)處理過之SiO2/Si基板上，再以蒸鍍金作為電極，建構為底閘極頂接觸(bottom-gate top-contact)之有機場效應電晶體元件(organic field effect transistors; OFETs)。根據改變不同的噴塗參數(如噴塗壓力、流量、噴塗距離及噴塗時間等)及以不同親水性之矽烷處理或製作圖案化矽烷於基材上，用以探討其對半導體薄膜表面形態和電氣特性影響。經由選用最佳化參數所製作之元件，P型半導體F8T2與TIPS-PEN分別可達電洞遷移率(hole mobility)為0.02 cm2 V-1 s-1和1.18 cm2 V-1 s-1；雙極性半導體PSeDPP可同時達5 cm2 V-1 s-1及1.13 cm2 V-1 s-1之電洞遷移率和電子遷移率(electron mobility)，並皆有超過102之電流開關比(Ion/Ioff)。最後使用噴塗法試產大面積圖案化元件陣列，在8 × 8共64個元件中有超過93%的元件可正常工作，替快速製作大面積微米級圖案化元件陣列提供了一種新的製程方法。;Spray-coated organic semiconductors such as conjugated polymer of poly[(9,9-dioctylfluorenyl-2,7-diyl)-co-bithiophene] (F8T2), small molecular of 6,13-bis(triisopropyl-silylethynyl)-pentacene (TIPS-PEN) and conjugated polymer of (selenophene-alt-3,6-dithophene-2-yl-2,5-bis-(2-hexyldecyl)-2,5 -dihydro-pyrrolo[3,4-c]pyrrole-1,4-dione) (PSeDPP) were constructed as organic field effect transistors (OFETs) on SiO2/Si substrate treated with various silanes or patterned silanes. The spray parameters and silanes selected were examined and corresponding morphologies of each organic semiconductors thin-film were systematically investigated while the OFETs were fabricated and characterized. After optimizing the condition used, F8T2 and TIPS-PEN could achieve hole mobility of 0.02 cm2 V-1 s-1 and 1.18 cm2 V-1 s-1 while PSeDPP could achieve hole and electron mobility of 5 cm2 V-1 s-1 and 1.13 cm2 V-1 s-1 simultaneously with on off current ratio of more than 102. Patterned OFETs array composed of 8 × 8 device layout on 4-inch Si wafer was also demonstrated with spray-coating approach and the percentage of devices worked successfully is exceeding 93%. As the result, the spray-coating process provides a new technique for fast manufacturing OFETs array in large-scale and compatible with the roll-to-roll process.
顯示於類別:	[化學工程與材料工程研究所] 博碩士論文

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