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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/69221


    Title: 適用於LTE上行鏈路可變長度DFT處理器之FPGA實現
    Authors: 李政毅;Lee,Cheng-yi
    Contributors: 通訊工程學系
    Keywords: LTE;Up Link;Cooley-Tukey;DFT;LTE;Up Link;Cooley-Tukey;DFT
    Date: 2015-10-21
    Issue Date: 2015-11-04 17:50:41 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 隨著LTE (Long Term Evolution,長期演進計畫)在市場上快速地拓展,未來將有更多的行動通訊營運商投入LTE網路的部建與試驗,它可以讓營運商用較為低廉的成本提供無線寬頻服務,並超越以往3G網路的效能,帶來更優異的表現。其中離散傅立葉轉換(DFT)處理器為LTE上行鏈路的關建模組,因此在本論文中,將設計與實現一個低複雜度及高效率並可適用於LTE-UpLink所有點數之離散傅立葉轉換處理器,並採Cooley-Tukey快速傅立葉轉換演算法,將N-點DFT的計算分解成一些較小點數的DFT,這樣的分解方式可大幅降低計算N-點DFT所有取樣點時所需的乘法與加法次數而使複雜度降低。
    另外,旋轉因子(Twiddle Factor)的乘法以座標軸數位旋轉計算器(CORDIC)取代複數乘法器。架構中用到之記憶體以環形緩衝區(circular bu er)來實現,其具有FIFO (First In FirstOut)的特性且能夠節省功耗。最後透過Xilinx Virtex-4 XC4VLX160來實現1200、1152、1080、972...共32種點數的快速傅立葉轉換處理器。;With the rapid growth of LTE (Long Term Evolution) in commercial market, more and more telecommunications operator intend to invest much capital in development of LTE network, it can not only make operators reduce the cost to provide service of wireless broadband , but improve the e ciency beyond 3G Network. And the DFT/IDFT processor is the core technique in achieves transmitter/receiver of LTE Up-Link. In this thesis, we designed and created a low-complex and high performance DFT/IDFT processor appropriate for LTE Up-Link with all points needed. And we adapt Cooley-Tukey algorithm to decompose N-point DFT into the smaller points DFT, by
    this algorithm we can easily decrease the usage of adders and multipliers.

    Besides, multiplication (Complex Multiplier) of Twiddle Factor can be replaced by CORDIC
    (Coordinate Rotation Digital Computer). We make use of Circular bu er which has property of
    FIFO (First in rst out) and require not much power. Finally, we run this program on Xilinx
    Virtex-4 XCVLX160 to accomplish 1200、1152、1080、972. . . (32 kinds of point) Fast Fourier Transform.
    Appears in Collections:[通訊工程研究所] 博碩士論文

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