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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/72594

    Title: 基於模態漸變之嵌入式矽波導至混合電漿波導極化模態轉換器;Mode-Evolution-Based Embedded Si Strip-to-Hybrid-Plasmonic Waveguide Polarization Mode Converter
    Authors: 馮任偉;Feng, Ren-Wei
    Contributors: 光電科學與工程學系
    Keywords: 模態轉換器;電漿波導;極化旋轉;mode converter;plasmonic waveguide;polarization rotation
    Date: 2016-11-17
    Issue Date: 2017-01-23 16:33:53 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 為了使光在次波長的尺度下傳輸,矽混合電漿 (silicon hybrid plasmonic)結構由於其高電磁場侷限能力與較低之傳播損耗,已被視為可用於實現高密度光子積體線路 (integrated photonic circuit)整合的解決方案。本研究提出的兩個基於模態漸變(mode evolution)原理之嵌入式 (embedded)矽波導至混合電漿波導 (hybrid plasmonic waveguide)之極化模態轉換器都具有四段不同的金屬結構,且使用矽、二氧化矽與銀作材料並相容於絕緣層覆矽 (silicon on insulator)製程,可將介質波導中的準TE$_{00}$模態旋轉並耦合至混合電漿波導之HP$_{01}$基模 ,以連結矽光子 (Si photonics)與電漿 (plasmonic)線路。
    設計原理是先將轉換器視為沿傳播方向的無數區域截面結構之組合,分析各截面之特徵模態後,以橫向磁場 (TM)極化分量之梯度變化描述模態之漸變過程,並同時以有效折射率 (effective index)實部描述傳播損耗,最後將兩者結合以快速取得次優化之設計以減少運用數值模擬進行參數掃描之需求。經有限元素法 (finite element method, FEM)與有限時域差分 (finite-different time-domain)法逐段進行最佳化後得到的兩個結構其元件面積分別為<7$\times$0.6 $\mu$m$^2$與<6$\times$0.43 $\mu$m$^2$。於工作波長1.55 $\mu$m下考慮模態匹配 (mode-matching)所得輸出端之模態轉換效率、極化轉換效率、極化消光比與插入損耗分別為87.58 % (90.09 %)、99.87 % (99.96 %)、27.9114 dB (34.3846 dB)與0.5899 dB (0.4592 dB)。此外,在輸出端之模態轉換效率>80 %、極化轉換效率>92 %與插入損耗<1 (dB)的條件下,帶寬分別為133 nm (176 nm)、182 nm (>200 nm)與139 nm (181 nm)。金屬之厚度與寬度容差在插入損耗<1 dB的條件下分別為80 nm與120 nm,在模態轉換效率>80 %的條件下分別為80 nm與>105 nm。各特性參數除了證明元件適用於光通訊C波段、製程要求度低與小型化,亦支持本研究對模態漸變之極化模態轉換器所提出的設計原理。

    ;For realizing high-density photonic integrated circuits, subwavelenth waveguides are essential. Hybrid plasmonic waveguides (HPWs) have been regarded as a promising solution for its subwavelength field confinement capability and low loss characteristic compared to traditional plasmonic waveguides. In this research, two hybrid-plasmonic-mode-evolution-based polarization mode converters (PMCs) for rotating and coupling the photonic quasi-TE$_{00}$ mode in an embedded silicon waveguide to the HP$_{01}$ mode in a HPW have been presented. Both designs are silicon-on-insulator-compatible and consist of four-section asymmetric/symmetric top silver (Ag) structures.

    The design principle is based on considering the whole PMC as a cascade of HPW slices, each of which having its eigenmodes along the propagation direction. The gradient ascent of the transverse magnetic polarization fraction and the minimum rate of change in the modal index (real part) of the eigenmode are used to rapidly obtain sub-optimum designs and are proved to effectively reduce heavy reliance on parameter sweeps using numerical computations. The former describes the mode evolution process, while the later deals with the propagation loss problem.

    The footprints of the two numerically optimized PMCs are <6$\times$0.43 $\mu$m$^2$ and<7$\times$0.6 $\mu$m$^2$, respectively. The mode conversion efficiency (MCE), polarization conversion efficiency (PCE), polarization extinction ratio (PER), and the insertion loss (IL) of the first (second) PMC design are found to be 87.58 % (90.09 %), 99.87 % (99.96 %), 27.9114 dB (34.3846 dB), and 0.5899 dB (0.4592 dB), respectively, at the operating wavelength of 1550 nm. Under the conditions of MCE>80 %, PCE>92 % and IL>80 %, the corresponding spectral range of the first (second) design is 133 nm (176 nm), 182 nm (>200 nm) and 139 nm (181 nm), all covering the entire $C$ band of optical telecommunication. The fabrication tolerances of the top Ag structure and the silica spacer are also discussed. The PMCs presented here whose performance are rigorously evaluated are not only well-designed and ultracompact in size, but also support the novel design principle for mode-evolution-based PMCs presented in this work.
    Appears in Collections:[光電科學研究所] 博碩士論文

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