以實務軟體定義無線電實現LTE上行鏈路收發機;Design and Implementation of LTE Uplink Transceiver with SDR Platform

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Communication Engineering > Electronic Thesis & Dissertation > Item 987654321/72625

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/72625

Title:	以實務軟體定義無線電實現LTE上行鏈路收發機;Design and Implementation of LTE Uplink Transceiver with SDR Platform
Authors:	陳俊棋;Chen, Chun-Chi
Contributors:	通訊工程學系
Keywords:	長期演進技術;單載波頻分多址;軟體定義無線電;LTE;SC-FDMA;SDR
Date:	2016-10-13
Issue Date:	2017-01-23 17:08:05 (UTC+8)
Publisher:	國立中央大學
Abstract:	本篇論文將介紹如何在軟體定義無線電平台上實現LTE上行鏈路規格之收發機，長期演進技術(Long Term Evolution, LTE)為第四代行動通訊重要技術之一，此技術主要為單載波頻分多址(Single-Carrier Frequency Division Multiple Access, SC-FDMA)系統，基本架構相似於(Orthogonal Frequency Division Multiplexing, OFDM)，SC-FDMA 是OFDM 先經由預編碼運算，此運算是經由離散傅立葉轉換(Discrete Fourier Transform, DFT)完成，使用預前編碼可降低均峰比(Peak-to-Average Power Ratio, PAPR)，有效降低功率使用，可以提高移動終端的功率發射效率，延長電池的使用時間，降低終端成本。本篇論文將利用可程式化邏輯閘陣列(Field-Programmable Gate Array, FPGA)板結合射頻元件(AD9361)，所打造的軟體定義無線電平台實現，實現符合LTE 上行鏈路規格之發射機與接收機，並在實際空中對傳訊號。在發射機之訊號處理模組中設計了串列轉並列處理器、星座圖映射器、DFT 處理器、IFFT 處理器、循環字首置入器和領航碼置入器等，而在接收機設計了訊號同步器、FFT 處理器、通道估測器、通道等化器、IDFT 處理器等。;This paper will describe how to implement the LTE uplink transceiver specifications on software defined radio platform. LTE (Long Term Evolution) is important for fourth generation of mobile communication technologies. On the uplink transmission system, the LTE system uses SC-FDMA (Single-Carrier Frequency Division Multiple Access) technology. The SC-FDMA structure is like as OFDMA (Orthogonal Frequency Division Multiple Access). SC-FDMA pre-coded the information-bearing symbols by DFT (Discrete Fourier Transform). This pre-coding operation can reduce PAPR power.It can benefit power efficiency which used in mobile terminal and it can extend the usage time of the battery. It also can reduce manufacturing cost. In this thesis, we conduct design and implementation of LTE uplink transceiver with FPGA (Field-programmable Gate Array) and RF component(AD9361). The transceiver can be realized with the Software Defined Radio platform. The transmitter includes parallel-to-serial module, constellation mapper, DFT, Invers FFT, cyclic prefix inserter and pilot inserter. The receiver includes signal synchronizer, FFT, channel estimator, channel equalizer, Invers DFT etc.
Appears in Collections:	[Graduate Institute of Communication Engineering] Electronic Thesis & Dissertation

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