本論文研究N型有機材料C60的開孔式源極垂直電晶體，並探討不同源極結構對於垂直電晶體開/關電流比及電流密度之影響。利用膠體微影技術獲得大面積且高均勻性的單層奈米球膜作為金屬蒸鍍遮罩，可製作出高孔洞覆蓋率的開孔式源極。此外選用高功函數金屬銀作為源極材料，搭配全氟癸烷硫醇單分子層PFDT修飾銀源極功函數來提升與C60間的蕭特基能障，並比較孔洞覆蓋率及C60厚度對於垂直電晶體電性表現的影響。由實驗結果可知，在100 nm-C60有最大的開電流密度之收集，但關電流密度抑制能力差，已無明顯的開/關電流表現。為了有效抑制關電流密度，試著使用更高功函數金屬金、以硫醇基單分子層MUA優化銀源極表面形貌以及推疊金屬氧化物作為內部電流阻絕層。整體而言，以雙電子槍蒸鍍系統於開孔銀源極上鍍製適當厚度的Al2O3絕緣層，且搭配100 nm-C60主動層垂直電晶體可有效的抑制關電流密度至少一個數量級，其開電流密度可達101~102 mA/cm2和開/關電流比接近103，此電性表現以達到驅動OLED條件，未來可將垂直電晶體應用於顯示面板中。;The thesis studies different patterned source electrode structures and their effects on the on/off ratio and current density of C60 vertical organic transistors. By using colloidal lithography to prepare large area, highly uniform nanospheres monolayer as the evaporation mask, the patterned electrode with high perforations coverage was obtained. The device was fabricated with the high work function Ag source electrode modified with PFDT self-assembled monolayer (SAM) to increase Schottky barrier berween Ag and C60. Next the electrical performance of transistors with different perforations coverage and thickness of C60 layer was investigated. The experimental results showed that the transistor exhibits the highest on-current density with 100 nm C60, but the off-current increases significantly with source-drain voltage, and hence the on/off ratio is poor. In order to reduce the off-current density for 100 nm C60 transistors, several methods were investigated: Au electrode with a higher work function, using MUA-SAM to optimize surface morphology of electrode, and depositing metal oxide layer on Ag-source as a blocking layer. Overall, deposition of appropriately thick Al2O3 on Ag source by Double E-gun results in off-current about 10 times lower than Ag source treated with PFDT-SAM, while the on-current density reaches 101~102 mA/cm2 and on/off ratio is nearly 103. The device is expected to be used to drive OLEDs and applied for display technology in the future.
