二維材料有優異的電傳輸性質與高撓曲性，使其深具潛力，並應用於下世代的軟性電子與穿戴式元件。其中石墨烯已被廣泛研究，然而石墨烯之本質上缺乏能隙的情況下，無法製作邏輯電晶體元件(logic device)，侷制其積體電路之發展。近期，一種新的半導體二維材料- 黑磷烯(phosphrene)被發現，這是一種單原子層的黑磷(Black phosphrene)結構，其特點為直接能隙(~2eV)，且優異的電傳輸性質，其電晶體元件之汲極電流調製(on-current)與載子遷移率(mobility)皆優於其他二維層狀材料是近年來所知之電傳輸性質最好的二維材料，因此近一年來引起很大關注。然而，目前的瓶頸是:(1)黑磷烯在暴露於有氧的環境下，會在短時間內反應劣化，(2)且目前黑磷烯的合成仍以機械剝離法獲得，其層數、尺寸皆無法控制，也因此僅能是基礎科學之研究。因此需要能大面積合成此材料之技術。 本計畫規劃三年，以解決上述的大面積合成、表面氧化問題，並研製和驗證其電晶體元件和光電元件(proof-of-concept device fabrication)，期望以整合性的研究，使黑磷烯進入實際元件的應用。第一年的目標為黑磷材料的可控制性研究: (1)研究批覆保護層(介電氧化物)對於元件的可靠度與電傳輸特性之分析；(2)有機小分子對電晶體元件之改質影響;(3)改善黑磷烯元件的接觸阻抗問題。第二年之目標為大面積高結晶黑磷烯之合成: (1) 以化學氣相沉積法直接成長基板; (2) 以氣相沉積法由黑磷烯晶種進行外沿生長; (3) 固-液-氣生長法。第三年之目標為元件製作與驗證: (1)電晶體元件製作、量測與可靠性; (2) 異質接面結構的元件於邏輯元件製作; (3) 堆疊異質接面於光感元件製作。 ;2D materials haveattractedmuch attentionsrecently.It have been regarded as frontier electronic materials in the future due to its superior electronic transportproperties and mechanical flexibility, which make it potential for high performance and wearable electronics. Graphene is a typical 2D materials with high carrier mobility, however, it still can't be applied in logic device due to the lack of bandgap. Recently, a novel 2D material- atomic layered back phosphorus(so-called Phosphorene) have been discovered, its electronic properties,including direct bandgap(~2 eV)、high carrier mobility、on-off ratio, are superior than other reported 2D materials(MoS2、WS2、MoSe2 etc.). It is a raising topic to investigate the condensed physics of phosphorene. However, there still some issuesrequired to beaddress before going to particleapplications: (1)Degradation when it was exposed to air atmosphere. (2). There still lack of technology for large area synthesis of phosphorene. In this project, we plane to address these two issues and also investigate the fundamental properties of this materials. The 1st year plane including: (1) improve the surface degradation bysmall molecular protection and ALD formal layer onas-prepared phosphorene.(2) Improving the contact resistance issue of phosphorene-based transistor. The 2ed year plane is mainly on large-scale growth of phosphorene film by CVD approach. The 3rd year plane is the proof-of concept device fabrications, this including (1) phosphorene device based on CVD-grown film : the transistor fabrications and characterizations. (2) logic device(CMOS inventor) and optical electronics(photosensor and diode): heterostructure fabrications and device applications.
