微波及毫米波量測儀器系統之高性能前端積體電路開發;Development of High Performance Frontend Integrated Circuits for Microwave and Millimeter-Wave Measurement Instruments

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題名:	微波及毫米波量測儀器系統之高性能前端積體電路開發;Development of High Performance Frontend Integrated Circuits for Microwave and Millimeter-Wave Measurement Instruments
作者:	張鴻埜
貢獻者:	國立中央大學電機工程學系
關鍵詞:	微波;毫米波;積體電路;低抖動;低相位雜訊;多相位時脈;追蹤維持電路;鎖相迴路;;Microwave;millimeter-wave;integrated circuit;low jitter;low phase noise;multi-phase clock;track-and-hold circuit;phase-locked loop
日期:	2018-12-19
上傳時間:	2018-12-20 13:48:11 (UTC+8)
出版者:	科技部
摘要:	本研究計畫將開發應用於微波及毫米波量測儀器之高速前端模組和積體電路，實現的方法是使用先進矽基製程和三五族化合物半導體技術。在時域量測分析上，電路設計頻寬分別以10 和50 GHz 為目標，取樣率則介於10 至60 GS/s。在頻率量測分析上，電路操作以Q、V 及W 頻段為主。研究工作包含有量測儀器之前端模組和電路系統分析平台建立、微波及毫米波積體電路設計和構裝技術開發。將開發的電路包含有多相位低抖動時脈源、寬頻放大器、取樣器及降頻電路等。研究成果可應用於手持式量測儀器，如示波器和頻譜分析系統，同時降低手持式微波及毫米波量測儀器前端模組開發成本、體積、重量及直流功率消耗，並改善性能。在低抖動時脈源研製上，將著重於多相位、低直流功率消耗和低相位誤差。多相位產生方法包含有延遲鎖相迴路和高頻多相位振盪器方法。在降低相位雜訊研究上，也將結合次諧波注入和鎖頻迴路來穩定電路與改善性能。預期可得到成果為微波及毫米波量測儀器相關技術建立、參與研究計畫之人員培育、創新積體電路開發研究、相關量測技術發展及高整合前端模組和電路之相關技術研究。在執行期間，工作項目將包含系統規劃、電路設計及佈局、晶片製作與評估。將研製高速前端模組和積體電路，設計及佈局將完成並送至代工廠製作。最後，完成量測分析。 ;This project will develop the high-speed frontend modules and integrated circuits for the applications of the microwave and millimeter-wave (MMW) measurement instruments, and the circuits will be implemented using a few advanced silicon-based and III-V compound semiconductor processes. For the time-domain measurements, the bandwidths of the developed circuits are 10 and 50 GHz, respectively, and the sampling rate is from 10 to 60 GS/s. For the frequency-domain measurements, the operation frequency windows will be Q, V, and W-bands. The research works contain the development of the system analysis, MMW integrated circuits (ICs), and the package technology for the MMW instruments. The multi-phase low-jitter clock generator, broadband amplifier, track-and-hold, and down-conversion ICs will be designed and studied. The developed ICs and modules will be employed in the hand-held instruments, such as oscilloscope and spectrum analyzer, to further reduce the cost, size, weight, and dc power consumption of the MMW frontend module, and also enhance the performance. The research of the low-jitter clock generator will focus on multi-phase generation, low dc power consumption, and low phase error. The multi-phase generation techniques consist of delay-locked loop and high-frequency multi-phase oscillator. The sub-harmonically injection and frequency-locked loop will be also adopted to stabilize the frequency and reduce the phase noise. We will achieve the establishment of the MMW instrument technology, the innovative ICs, the related measurement technology, and the high-integrated frontend circuits and modules. The system planning, IC design, chip layout, fabrication and chip evaluation will be exercised. The design will also be completed and sent to the foundry for fabrication. In last, the measurement and analysis of the developed high speed frontend ICs and modules will be carried out.
關聯:	財團法人國家實驗研究院科技政策研究與資訊中心
顯示於類別:	[電機工程學系] 研究計畫

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