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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/8065


    Title: 具延遲處理器的空時碼之軟式輸入輸出遞迴解碼;Soft-Input/Soft-Output Iterative Decoding for Space-Time Coding With a Delay Processor
    Authors: 楊鈞偉;Chun-Wei Yang
    Contributors: 通訊工程研究所
    Keywords: 籬柵編碼調變;延遲處理器;軟式輸入輸出遞迴解碼;多樣性;空時碼;space-time code;soft-input/soft-output (SISO) iterative decoding;trellis coded modulation;delay processor;diversity
    Date: 2005-07-06
    Issue Date: 2009-09-22 11:17:12 (UTC+8)
    Publisher: 國立中央大學圖書館
    Abstract: 在無線通道的編碼技術中,多樣性與編碼增益是影響錯誤效能的兩大重要因素。最近,結合具有延遲處理器的籬柵編碼調變與正交空時區塊碼的架構被提出,這個架構可以在窄頻的半平穩衰退通道與寬頻的正交分頻多工衰退通道中有效率的獲得全多樣性並且同時擁有好的編碼增益。之前對於這個架構所作的解碼是使用硬式輸出遞迴解碼,為了獲得更好的效能,在本篇論文中,我們使用軟式輸入輸出遞迴解碼,並將此架構與位元交錯編碼調變作比較。 The diversity gain and coding gain are two important factors in wireless communications. Recently, the scheme that concatenates space-time block coding with trellis coded modulation with a delay processor is proposed, which can efficiently achieve the full diversity and also obtain good coding gain for the narrowband quasi-static fading channels and the wideband OFDM fading channels. The decoding way for this scheme was a hard-output iterative decoding previously. In order to further improve the error performance, we use the soft-input /soft-output iterative decoding in this thesis and compare it with the BICM scheme.
    Appears in Collections:[Graduate Institute of Communication Engineering] Electronic Thesis & Dissertation

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