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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/8140


    題名: 進化演算法於最小相位IIR數位濾波器之設計;Design of Minimum-Phase IIR Digital Filters by using Evolutionary Algorithms
    作者: 張耀仁;Pablo Chang
    貢獻者: 通訊工程研究所
    關鍵詞: 數位濾波器;最小相位;進化演算法;Digital Filters;Minimum Phase;Evolutionary Algorithms
    日期: 2006-06-30
    上傳時間: 2009-09-22 11:19:13 (UTC+8)
    出版者: 國立中央大學圖書館
    摘要: 相較FIR濾波器,IIR濾波器是被認為更有效率的實現方式,因它能使用較少的濾波器階數(filter order)且節省記憶體與計算量。但IIR濾波器在實現上卻存在兩個通訊領域不可忽視的問題,分別為穩定性(stability)和線性相位(linear phase),因此本論文將設計出具最小相位(minimum phase)的IIR數位濾波器,不但改善IIR系統的非穩定性,且也讓群組延遲(group delay)達到最小。 在傳統演算法裡,濾波器係數設計都無可避免會掉入系統局部最小值(local minimum)。而本論文將使用進化演算法(Evolutionary Algorithm)設計出我們所要的最小相位IIR數位濾波器,因它能較有機會朝全域最佳解(global optimum)的空間收斂,同時我們也會嘗試改良演算法之適應性函數(fitness function),使其能藉由同時使用三種誤差方程式(LMS、MSE、MAE)讓所設計出的濾波器雛形更趨理想。 進化演算法設計出來的最佳化係數為無限精確度,故我們提出藉由帶正負號二冪次項配置法則(SPT-AS, signed power-of-two allocation scheme)的離散空間裡搜尋出一組全域最佳IIR數位濾波器係數,如此讓移位暫存器取代乘法器使硬體效能提高,且濾波器係數可直接應用在硬體實現上,避免係數量化誤差的風險,這便是有限精確度效果。 Relative to FIR filters, IIR filters have better realization structure. Because it uses less filter orders and saves memories and computation. However, IIR filters have two major problems, which cannot be neglected in communication engineering. One is stability and the other is linear phase. The minimum-phase IIR digital filter will be designed in the thesis so that one not only reforms the system’s unstability but also minimizes the group delay. In conventional algorithm, the search for the filter coefficients may drop into local minimum. An evolutionary algorithm will be used in this thesis for designing minimum-phase IIR digital filter. Because it has better opportunities to converge to global optimum. In addition, we have designed the fitness functions by using three kinds of error functions (LMS, MSE, MAE) simultaneously so that the filter model tends to more ideal. The optimum filter coefficients designed by evolutionary algorithm are assumed the infinitely-precision. For this reason, we propose that a group of IIR digital filter coeficients of global optimum can be searched by using signed power-of-two allocation scheme. It utilizes shifter registers to replace multiplications for improving hardware efficiency. Moreover, designed filter coeficients can be applied directly to hardware realization without taking risk of quantification inaccuracy of coefficients, which is the merit of finitely-precision.
    顯示於類別:[通訊工程研究所] 博碩士論文

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