| 摘要: | [總計畫]總計畫目標規劃達成採用寬能隙元件(GaN HEMT)建構的高功率轉換器 (converter)系統，分別採用表面安裝封裝元件和積體化來達成高效率高功率密度目標。計劃執行與業界合作密切，跟磊晶公司，元件製程公司，功率元件公司，系統應用公司等有密切的合作。目前計畫執行，GaN功率元件相關技術已經成功於六吋量產片試運行，成功研發出650V/106 mΩ和100V/74 mΩ功率元件，以及E-/D-mode 100V 邏輯元件。子計畫一並建立SPICE模型提供給子計畫三的轉換器研發，完成高頻LLC諧振式DC/DC轉換器實測，輸出功率1 kW,切換頻率1.5 MHz，功率密度達40.1 W/cm3，達成國際指標。新的二年目標，子計畫一仍提供子計畫二的新穎磊晶片，包括6吋矽晶片和其他高散熱基板的磊晶。子計畫二持續研發改善水平的GaN HEMT和GaN SBD，以及垂直的大電流GaN SBD和GaN FET。子計畫三的轉換器採用子計畫一的元件SPICE模型來進行設計達成積體化的目標。在積體化部分，將驅動電路跟功率電晶體積體化在一起，以190 W為應用目標，將可以在1 - 1.5 MHz的切換速度下，達成高功率密度(60 W/cm3)。而原先總體目標(封裝元件)，目前已是為國際標竿之一，寄望二年後，更進一步提升功率密度達世界紀錄。[子計畫一]子計畫一目標規劃朝三個方向進行，分別是氮化鎵材料之磊晶開發，氮化鎵元件測試(可靠度分析)，和元件模型建立。除提供子計畫二的新穎磊晶片，包括在6吋矽晶片和其他高散熱基板的磊晶外。也將探討新穎結構與材料之磊晶技術，協助我國業者突破國外競爭者之專利，追求更佳之元件特性，並解決目前GaN HEMT之可靠性問題。在元件可靠度分析部分則進行漏電流和崩潰電壓研究、關閉後之動態導通電阻、高正閘極偏壓/溫度下的穩定性、發生在汲極崩潰現象。最後建立SPICE元件模型，研究計生電感效應，提供子計畫三的轉換器研發。元件模型包括靜態I-V和C-V特性曲線、動態double pulse測試特性、I-V熱效應特性、和封裝元件的雜散電感效應。 ;Main project aims to achieve a high-power converter system using a wide bandgap element (GaN HEMT) with surface-mount packaged components and integration to achieve high efficiency and high power density goals. The implementation of the plan is closely cooperating with the industry, and has close cooperation with epitaxial companies, manufacturing companies, power component companies, and system application companies. At present, GaN power device-related technology has been successfully run on six-inch production wafers, and successfully developed 650V / 106 mΩ and 100V / 74 mΩ power devices, and E- / D-mode 100V logic devices. The sub-project 1 established a SPICE model for the development of the converters in the sub-project 3 which completed the high-frequency LLC resonant DC / DC converter. The output power is 1 kW, the switching frequency is 1.5 MHz, and the power density reaches 40.1 W / cm3, meeting international standards. The new two-year target, sub-project 1 still provides novel epitaxial wafers for sub-project 2, including 6-inch silicon wafers and other epitaxial wafers with high heat dissipation. Sub-project 2 continued to develop improved GaN HEMTs and GaN SBDs, as well as vertical high-current GaN SBDs and GaN FETs. The converter of sub-project 3 uses the SPICE model of sub-project 1 to design to achieve the integration goal. In the integration part, the driving circuit is integrated with the power transistors. With 190 W as the application target, it can achieve a high power density ( 60W / cm3) at a switching speed of 1 - 1.5 MHz. The original overall goal (package components) is now one of the international benchmarks. It is hoped that two years later, it will further increase its power density to a world record. The sub-project 1 has a target planning in three directions, namely the epitaxial development of GaN materials, reliability analysis, and device model. In addition to providing new epitaxial wafers for sub-project 2, including epitaxial wafers on 6-inch silicon wafers and other high heat dissipation substrates. The epitaxial technology of novel structures and materials will also be explored to assist our industry players in breaking the patents of foreign competitors, pursuing better device characteristics, and solving the current reliability issues of GaN HEMTs. In the reliability analysis, the leakage current and breakdown voltage are studied, the dynamic on-resistance after off-state, the stability under high positive gate bias voltage / temperature, and the phenomenon of the breakdown of the drain. Finally, a SPICE model is established to study the parasitic inductance effect. The model includes static I-V and C-V characteristic curves, dynamic double pulse test characteristics, I-V thermal effect characteristics, and stray inductance effects of packaged components. |
