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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/91375


    Title: 使用FPGA的YOLO物件偵測推論硬體加速器設計;Yolo Object Detection Inference Hardware Accelerator Design Using Fpga
    Authors: 陳慶瀚
    Contributors: 國立中央大學資訊工程學系
    Keywords: YOLO;物件偵測;硬體加速器;FPGA;YOLO;Object Detection;Hardware Accelerator;FPGA
    Date: 2023-07-17
    Issue Date: 2024-09-18 14:51:40 (UTC+8)
    Publisher: 國家科學及技術委員會
    Abstract: 本計畫將設計和實作一個YOLO物件偵測網路的FPGA硬體加速器,除了預期性能優於目前已發表的基於FPGA的YOLO硬體加速器,同時具有硬體可重組架構的獨特優勢,提供視訊監控、輔助駕駛、工業視覺檢測等產業得以簡易、快速透過彈性、可重組方式改變硬體加速功能。因此有助於縮短YOLO物件偵測應用系統開發、佈署的周期,提升AI視覺產品的產業競爭力和生產力。
    Relation: 財團法人國家實驗研究院科技政策研究與資訊中心
    Appears in Collections:[Department of Computer Science and information Engineering] Research Project

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