應用於次世代被動光纖網路傳輸之高速正交分頻多工傳收器設計

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姓名

張智翔(Chih-Hsiang Chang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用於次世代被動光纖網路傳輸之高速正交分頻多工傳收器設計
(High Speed OFDM Transceiver Design for Next Generation PON Communication)

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摘要(中)

光纖網路傳輸擁有高速、長距離的優勢使得發展10Gbps的次世代被動光纖網路 (Next Generation-Passive Optical Network) 為必然趨勢，在此高速傳輸下衍生出成本過高、實現困難的問題，因此將OFDM技術應用在光纖系統之研究為近年來熱門的討論主題。
在本論文中，基於應用在光纖系統的OFDM架構，我們將提出可以使用任意子載波來偵測同步非理想效應之架構，以提高有限頻帶中能使用的頻寬，並且提出一個結合取樣時脈同步與等化器，因而系統不需要多做同步電路，並使此架構可適用在10 Gbps PON系統中。
而在此高速應用中，所設計的電路能否達到光纖系統的高速需求與低成本最為重要，因此在硬體考量方面，本論文實現系統中的關鍵電路，高速FHT硬體，並應用於高速光纖OFDM系統中。電路設計使用90nm製程，核心面積為0.476x0.451 mm2為，核心時脈312.5MHz，在1.0V的電壓下，晶片功率為27.00mW。

摘要(英)

The advantages of optical fiber communications are high speed and long distance as a result of low transmission loss. To develop the Next Generation Passive Optical Network (NG-PON) is one of the main focuses. Particularly, the key issue is the cost-efficient device been feasible. Thus, OFDM technique in optical communication to increase spectral efficiency becomes popular in this domain.
In the thesis, we propose a new architecture for 10Gbps PON to detect the sampling clock offset using any subcarrier in each OFDM symbol. The proposed architecture joins timing recovery synchronization and equalization to reduce the cost of conventional timing synchronization for cost-efficiency and achieve a superior performance.
In hardware implementation, we propose the high speed FHT hardware to achieve high-speed circuit requirement in optical fiber communications. Whole circuit, designed in 90 nm CMOS process, occupied 0.476x0.451 mm2 of core area, and totally consumes 27.00 mW in 1.0 Volt supply voltage at the clock rate of 312.5 MHz.

關鍵字(中)

★ 被動光纖網路傳輸
★ 正交分頻多工

關鍵字(英)

★ PON
★ OFDM

論文目次

摘要 i
Abstract ii
致謝 iii
目錄 iv
圖目錄 vi
表目錄 viii
第一章緒論 1
1.1 研究動機 1
1.2 正交分頻多工 (OFDM) 調變簡介 2
1.2.1 OFDM 之數學模型 3
1.2.2 保護區間與循環前置碼 4
1.3 NG-PON 系統架構 5
1.4 論文架構 7
第二章 NG-PON 同步與等化架構設計 8
2.1 符碼邊界同步 8
2.1.1 符碼邊界偏移效應 8
2.1.2 符碼邊界偏移估測 10
2.2 取樣時脈同步 11
2.2.1 取樣時脈偏移效應 11
2.2.2 取樣時脈偏移估測 13
2.3 LMS頻域等化器 15
2.3.1 直角座標系 LMS 頻率等化器 16
2.3.2 極座標系LMS頻率等化器 17
2.4 結合時脈同步與頻域等化器架構設計 19
2.4.1 自動增益控制與載波回復的頻域等化器 19
2.4.2 取樣時脈回復等化器 22
2.4.3 結合取樣時脈同步與等化雙迴路架構 24
第三章 NG-PON系統模擬與結果 26
3.1 傳送與接收端系統架構建置 26
3.2 傳送與接收端系統模擬環境 28
3.3 模擬取樣時脈偏移與補償效應 30
3.4 星座圖模擬結果 32
3.5 系統效能模擬 34
第四章 NG-PON高速FHT架構設計 36
4.1 FHT / FFT 36
4.2 FHT演算法 37
4.2.1 Radix-2 DIF FHT演算法 37
4.2.2 Radix-4 DIF FHT演算法 40
4.2.3 Radix-8 DIF FHT演算法 44
4.3 DHT與DFT轉換公式 47
4.4 FHT/FFT演算法比較 48
4.5 高速FHT硬體設計 49
4.5.1 FHT設計規格 49
4.5.2 FHT演算法硬體特性 50
4.5.3 FHT硬體架構 51
第五章關鍵電路FHT晶片實作與量測結果 55
5.1 晶片設計流程 55
5.2 定點數分析 56
5.3 晶片設計 57
5.4 晶片規格 58
5.5 晶片量測 60
5.6 硬體比較 62
第六章結論與未來展望 64
參考文獻 65

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指導教授

薛木添(Muh-Tian Shiue)

審核日期

2009-11-14

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