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姓名 謝志宏(Chih-hung Hsieh) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 基於IEEE P1901規格之PLC系統 基頻內接收機頻域等化器設計與實現
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摘要(中) 電力線通訊 (Power Line Communication),主要透過電力線,將數據或資訊以數位訊號處理方法進行傳輸,使用既有低頻(50/60Hz)的電力線路傳送寬頻的網路訊息,不需額外佈線及連接方便等優點,使其具”最後一哩”的優勢。但是電力線傳輸環境的不可預測干擾源以及大範圍線路阻抗變化,造成嚴重的雜訊干擾以及通道衰減。因此研究的重點在於如何解決電力線傳輸通道衰減以及抵抗雜訊干擾以提升傳輸效率。
本論文以IEEE P1901規格來設計一基頻接收機。此接收機包含了時域頻域轉換、同步與等化的功能。同步功能包含OFDM符碼邊界偏移估測和取樣時脈偏移估測與補償。等化部分包含通道效應估測與頻域等化器。IEEE P1901標準所制定的前導符元為512點,而傳送的data封包為4096點,為了得到相對應各子載波的通道效應,以前導符元作通道估測再做頻域內插,另外利用前導符元之間的相位差,得到SCO的初始值以加速SCO收斂。因為使用前導符元做通道估測和SCO Tracking,在收斂速度及補償上已有相當速度與準度,所以在頻域等化器方面採用極座標系LMS演算法,並針對可調整增益的數位座標軸旋轉計算器 (MGC-CORDIC),提出改良的通道估測與等化流程,減少硬體面積,在模擬方面,使用C code模擬傳輸過程及傳輸中的不理想效應,並與FPGA、Gate-level結果進行驗證。
摘要(英) Power Line Communication (PLC) is mainly about the transmission of information or data based on digital signal processing method. By using existing power distribution network as the transmission network, this method has the advantage of the “last mile” due to convenient connection and no need for extra wiring. However, unpredictable interference and a wide range of changing impedance, will result in severe noise interference and channel fading. Therefore, the researches in all fields have been focusing on how to solve the attenuation along the power line transmission channel and to improve transmission efficiency against noise interference.
In this dissertation a digital baseband receiver has been designed with respect to IEEE P1901 standard. The digital baseband receiver includes a time domain and frequency domain conversion, synchronization and equalization functions. The synchronization functions include symbol boundary detector and the sampling clock offset estimation and compensation. The equalization functions include channel estimation and frequency domain equalizer.
In IEEE P1901 standard the preamble is set to be 512 points and the transmitted data packet is set to be 4096 points. In order to obtain the channel effect corresponding to each subcarrier, preamble is used in channel estimation then interpolated. Because using preamble to realize channel estimation and SCO tracking, the gain will get better accuracy and speed in compensation and convergence. Therefore the proposed method improved the channel estimation and the equalization process to MGC-CORDIC, and adopted the Polar Coordinate LMS algorithm for the frequency domain equalizer. In addition, the proposed utilized the resource sharing mechanism to reduce the hardware area. And the C code has been used to simulate the transmission process and the undesirable effects during transmission. Finally, the proposed is designed and verified in TSMC 90nm CMOS process.
關鍵字(中) ★ 電力線通訊 關鍵字(英) ★ PLC 論文目次 摘要 i
Abstract ii
致謝 iii
目錄 iv
圖目錄 vii
表目錄 xi
第一章 緒論 1
1.1 前言 1
1.2 研究動機 2
1.3 論文架構 3
第二章 IEEE P1901 標準和系統架構 4
2.1 正交分頻多工調變介紹 4
2.1.1 OFDM 之數學模型 5
2.1.2 循環字首 6
2.2 PLC系統架構 8
2.3 IEEE P1901規格標準簡介 9
2.3.1 收發機系統架構 9
2.3.2 傳輸參數及實體層封包格式 10
2.3.3 反快速傅利葉轉換調變方法 11
2.3.4 前導符元格式及產生方法 12
第三章 PLC同步與等化架構設計 13
3.1 符碼邊界同步 13
3.1.1 符碼邊界偏移效應 13
3.1.2 符碼邊界偏移估測 15
3.1.3 符碼邊界同步硬體架構 17
3.2 取樣時脈同步 18
3.2.1 取樣時脈偏移效應 18
3.2.2 取樣時脈偏移估測 21
3.2.3 取樣時脈偏移補償 22
數位內插器 22
接收端的A/D取樣頻率大於傳送端D/A取樣頻率 27
接收端的A/D取樣頻率小於傳送端D/A取樣頻率 29
3.3 LMS頻域等化器 31
3.3.1 直角座標系LMS頻域等化器 31
3.3.2 極座標系LMS頻域等化器 33
3.3.3 指數型增益和相角LMS頻域等化器 36
3.4 結合取樣時脈同步與頻域等化器架構設計 40
3.4.1 自動增益控制和載波回復等化器 40
3.4.2 取樣時脈回復等化器 41
3.4.3 結合取樣時脈同步與等化雙迴路架構 43
第四章 結合通道估測與頻域等化器架構設計 44
4.1 通道估測與通道內插 44
4.1.1 通道估測 44
4.1.2 通道頻域內插 45
直角座標系內插[15][16] 46
極座標系內插 47
4.2 座標軸旋轉數位計數器 49
4.2.1 原理說明 49
4.2.2 向量模式 51
4.2.3 旋轉模式 52
4.3 MGC-CORDIC 53
4.4 對數與反對數轉換器[19] 58
4.4.1 對數轉換器 58
4.4.2 基於Least Squares演算法之對數轉換器 59
4.4.3 反對數轉換器 62
4.5 改良型MGC頻域等化器 65
4.5.1 通道估測與等化流程 65
通道估測流程 65
等化流程 68
4.5.2 改良型MGC-CORDIC架構 70
4.5.3 通道估測誤差比較 70
4.5.4 改良型MGC-CORDIC頻域等化器架構 74
第五章 PLC系統模擬與結果 78
5.1 模擬環境 78
5.2 取樣時脈偏移與補償模擬結果 80
5.3 星座圖模擬結果 81
第六章 模擬結果與電路比較 82
6.1 定點數分析 82
6.2 模擬結果驗證 84
6.3 硬體比較 85
第七章 結論與未來展望 86
參考文獻 87
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