使用T模型匹配網路之寬頻氮化鎵功率放大器暨金氧半場效應電晶體功率放大器設計及砷化鎵低雜訊降頻器之研製

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：81

、訪客IP：3.144.118.122

姓名

黃暄尹(Hsuan-Yin Huang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

使用T模型匹配網路之寬頻氮化鎵功率放大器暨金氧半場效應電晶體功率放大器設計及砷化鎵低雜訊降頻器之研製
(Design of Broadband Microwave Millimeter-wave GaN and CMOS Power Amplifiers Using T-Model Network and GaAs Low Noise Figure Down-Converter)

相關論文

★ 微波及毫米波切換器及四相位壓控振盪器整合除三除頻器之研製	★ 微波低相位雜訊壓控振盪器之研製
★ 高線性度低功率金氧半場效電晶體射頻混波器應用於無線通訊系統	★ 砷化鎵高速電子遷移率之電晶體微波/毫米波放大器設計
★ 微波及毫米波行進波切換器之研製	★ 寬頻低功耗金氧半場效電晶體射頻環狀電阻性混頻器
★ 微波與毫米波相位陣列收發積體電路之研製	★ 24 GHz汽車防撞雷達收發積體電路之研製
★ 低功耗低相位雜訊差動及四相位單晶微波積體電路壓控振盪器之研究	★ 高功率高效率放大器與振盪器研製
★ 微波與毫米波寬頻主動式降頻器	★ 微波及毫米波注入式除頻器與振盪器暨射頻前端應用
★ 寬頻主動式半循環器與平衡器研製	★ 雙閘極元件模型與微波及毫米波分佈式寬頻放大器之研製
★ 銻化物異質接面場效電晶體之研製及其微波切換器應用	★ 微波毫米波寬頻振盪器與鎖相迴路之研製

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文呈現前端收發機之子電路，包含兩個版本的功率放大器、低雜訊放大器、以及二極體混波器。在每個電路的分析中，我們描述了設計的細節，並闡述如何透過推拉式模擬、最大可用增益模擬以及直流特性分析等等來訂定合理的電路設計目標。本論文包含兩大部分，分別為前端收發機之接收端以及發送端。
首先，我們呈現低雜訊放大器以及二極體混波器的設計，這兩個電路是接收端重要的兩個子電路。本設計是使用穩懋ED模態0.15微米製程。電路的有效操作頻帶範圍是從25 GHz到40GHz，並且訂定38 GHz為電路中心頻率。低雜訊放大器在140 mW的直流功耗下的增益高達30 dB。另一方面，二極體混波器在10 dBm的本地振盪驅動源的情況下，表現出的增益(損耗)約為-6 dB。特別注意，二極體混波器受益於本身被動的設計，直流功耗甚小。
在功率放大器的設計中，我們訂定了飽和輸出功率為1 W的設計目標，並借助於穩懋氮化鎵製程，希望能設計出能操作於Ka頻帶以及Ku頻帶的功率放大器。然而，Ka頻帶功率放大器因為積熱的關係，導致電路無法正常運作，也造就了我們想更進一步設計較低頻的Ku頻帶功率放大器契機。Ku頻帶功率放大器在10 GHz到15 GHz頻帶間有15 dB的增益，並且有29 dBm飽和輸出功率的成果。
最後，我們藉由台積電40奈米CMOS製程，設計了W頻帶電路設計，並訂定了中心頻率為94 GHz的設計目標，然而因為在該頻帶嚴重的寄生效應、以及較大的匹配電路和被動元件損耗的影響下，這個版本的功率放大器並未成功運作，而相關的除錯方式和電磁模擬方法，我們也會詳細呈現於論文第四章。
本論文完成了前端收發機內除了天線及開關的各個子電路，此外，低雜訊放大器以及二極體混波器已經整合成單一晶片並送出製作，在未來的研究方向會將整合的晶片作完整的量測並分析，期待未來的結果能夠符合收發機的實際應用。

摘要(英)

In this paper, we present each block diagrams of front-end communication, including two versions of power amplifiers (PAs), a low noise amplifier (LNA) and a diode mixer in detail. To make our design goals achievable, we must consult load-pull, maximum available gain, and I-V curve and so on simulations carefully. There are mainly two parts of this paper, including receiver and transmitter of front-end communication system.
First, we present LNA and the diode mixer is design, which are important block diagrams of receiver. These two circuits are designed in operating frequency between 25 GHz and 40 GHz with center frequency at 38 GHz. They are design in process of WIN ED-Mode 0.15 μm. The performance of LNA achieve up to 30-dB gain with about 140-mW DC power consumption. On the other hand, the diode mixer shows up to -6- dB conversion gain (or conversion loss) with 10 dBm local oscillator (LO) driving power. Note that there is no DC power consumption in the diode mixer because it is completely work as a passive mixer.
Next, we set a goal to design a power amplifier with 1-W saturation output power. We design two amplifiers in WIN GaN process, including Ku- and Ka- band PA. The Ka-band power amplifier suffer from heat issue and fail to work. That is the reason why we design Ku-band version PA. The Ku-band successfully work as a 15-dB gain and nearly 29-dBm saturation output power from 10 GHz to 15 GHz.
Finally, we try to design a W-band PA in 40 nm CMOS process. We set a goal to achieve the center operating frequency at 94 GHz. It is the parasitic issue that makes a W-band PA suffer from high loss in matching network and passive component in the circuit. As a result, we fail to make this PA work due to misestimation of in-band bypass capacitor EM simulation. In Chapter 4, we will present how to debug and make the PA work.
Overall, we have consulted block diagrams in front-end communication system except for TX/RX switch and antenna design. Besides, a low noise down converter haven been taped out. It would be measured and make a front-end communication closer to be complete. In the future, the whole system should be integrated with antenna by TX/RX switch.

關鍵字(中)

★ 功率放大器
★ 低雜訊放大氣
★ 混波器
★ 射頻電路

關鍵字(英)

★ PowerAmplifier
★ LNA
★ Mixer
★ RF Circuit

論文目次

Abstract IX
摘要 X
誌謝 XI
Content XII
List of Figures XV
List of Tables XX
Chapter 1 1
Introduction 1
1.1 Motivation 1
1.2 Literature Survey 1
1.3 Contributions 2
1.4 Theory Organization 2
Chapter 2 4
Front-end of 38 GHz Receiver in WIN 0.15 μm E/D Mode pHEMT Process 4
2.1 Introduction 4
2.1.1 Model Presentation of WIN E/D-Mode GaAs pHEMT Process 4
2.1.2 Front-end of Ka-band Communication System [39] 5
2.2 Theorem of Noise Figure [39] 6
2.2.1 Basic Concept of Noise Figure 7
2.2.2 Principle of Source Degeneration to Lower the Noise Figure 10
2.3 38 GHz Low Noise Amplifier Circuit Implementation 13
2.3.1 38 GHz Low Noise Amplifier Design 15
2.3.2 38 GHz Low Noise Amplifier Measurement Result 18
2.4 38 GHz Diode Mixer Circuit Implementation 23
2.4.1 Marchand Balun EM Simulation 23
2.4.2 Size selection and Design of Diode 25
2.4.3 38 GHz Diode Mixer Design 27
2.4.4 38 GHz Diode Mixer Measurement Result 30
2.5 Performance Summary and Future Work for Front-end System 36
Table 2-3. Performance Summary of the 38 GHz Diode Mixer 37
Table 2-4. Performance Summary of the 38 GHz Low Noise Amplifier 37
Chapter 3 39
Ka- and Ku-band Power Amplifiers Using T-Model Matching Network in WIN GaN pHEMT Process 39
3.1 Introduction 39
3.1.1 Model Presentation of GaN pHEMT Process [43] 39
3.1.2 Millimeter-wave Power Amplifier in Transmitter System [44] 40
3.2 Transformer Matching Network 41
3.2.1 Even-Odd Mode Theorem Analysis [45] 42
3.2.2 Principle of Coupling Coefficient [1] 44
3.2.3 Equivalent T-Model Network for Transformer Network [1] 46
3.3 Ka-band Power Amplifier Circuit Implementation 50
3.3.1 Ka-band Power Amplifier Design 50
3.3.2 Ka-band Power Amplifier Measurement Result 56
3.4 Ku-band Power Amplifier Circuit Implementation 61
3.4.1 Ku-band Power Amplifier Circuit Design 61
3.4.2 Ku-band Power Amplifier Measurement Result 66
3.5 Performance Summary 70
Table 3-6. Performance Summary of the Ku-band Power Amplifier 71
Chapter 4 72
Two-Cell Cascode W-band Power Amplifier in TSMC 40 nm CMOS Process 72
4.1 Introduction 72
4.1.1 Model Presentation of TSMC 40 nm CMOS Process Introduction 72
4.1.2 Application of W-Band Communication System 74
4.2 Passive Component Used in W-Band PA 74
4.2.1 Physical Line Model Construction 74
4.2.2 Design of T-Model in W-Band PA 76
4.2.3 W-Band Capacitors Design and Method to EM Simulation 77
4.3 W-band Power Amplifier Circuit Design 79
4.3.1 W-band Power Amplifier Design Flow 79
4.3.2 W-band Power Amplifier Measurement Results 84
4.4 EM Method to Debug 85
4.4.1 Transistor Connecting Lines and Via EM Simulation 86
4.4.2 EM Simulation around Transistors 88
4.4.3 Re-design of W-band Power Amplifier 92
4.5 Performance Summary and Future Work for W-band PA 96
Table 4-2. Performance Summary of the W-band Power Amplifier 96
Chapter 5 97
Conclusions and Future Works 97
Reference 100

參考文獻

[1] P. C. Huang, Z. M. Tsai, K. Y. Lin, and H. Wang, “17–35 GHz Broadband, High Efficiency pHEMT Power Amplifier Using Synthesized Transformer Matching Technique,” in IEEE MTT, 2012, vol. 60, pp. 112-119.
[2] Q. J. Gu, Z. Xu, and M. F. Chang, “Two-way current-combining W-band power amplifier in 65-nm CMOS,” IEEE Trans. Microw. Thoery Techn., May 2012, vol. 60, no. 5, pp. 1365–1374.
[3] D. Zhao, P. Reynaert, “A 40-nm CMOS E-Band 4-Way Power Amplifier with Neutralized Boostrapped Cascode Amplifier and Optimum Passive Circuits”, IEEE MTT, vol. 63, NO. 12, Dec. 2015, pp. 4083-4089.
[4] C. Campbell et al., ”A wideband power amplifier MMIC utilizing GaN on SiC HEMT technology,” IEEE J Solid-State Circuits, vol. 44, no. 10, Oct. 2009, pp. 2640-2647.
[5] J. Komiak et al., ”Decade bandwidth 2 to 20 GHz GaN HEMT power amplifier MMICs in DFP and no FP technology,” IEEE MTT-S Int. Microw. Symp. Dig., pp. 1-4, Jun. 5-10, 2011.
[6] M.-C. Chuang, P.-S. Wu, M.-F. Lei, and H. Wang, “A miniature15–50-GHz medium power amplifier,” in IEEE Radio Frequency Integrated Circuits Symp. Dig., Jun. 11–13, 2006, pp. 471–474.
[7] M. Coffey et al., “A 4.2-W 10-GHz GaN MMIC Doherty power amplifier,” in Proc. IEEE Compound Semiconductor Integr. Circuit Symp., Oct. 2015, pp. 1–4.
[8] C. Park, D. H. Lee, J. Han, and S. Hong, “Tournament-Shaped Magnetically Coupled Power-Combiner Architecture for RF CMOS Power Amplifier”, in IEEE TMTT, vol. 55 NO. 10, Oct. 2007, pp. 2034- 2042.
[9] U. Schmid et al., ”Ultra-wideband GaN MMIC chip set and high power amplifier module for multi-function defense AESA applications,” IEEE Trans. Microw. Theory Tech., vol. 61, no. 8, Aug. 2013, pp. 3043-305.
[10] G. Mouginot et al., ”Three stage 6-18 GHz high gain and highpower amplifier based on GaN technology,” IEEE MTT-S Int. Microw. Symp. Dig., pp. 1392-1395, May. 23-28,2010.
[11] A. P. Freundorfer, Y. Jamani and C. Falt, “A Ka-band GaInP/GaAs HBT four-stage LNA,” IEEE Microw.and Millimeter-Wave Monolithic Circuits Symp. Dig.,Jun. 1996, pp. 141-144
[12] C. Pobanz, M. Matloubian, L. Nguyen, Michael Case, Ming Hu, M. Lui, C. Hooper, and P. Janke, “A high gain, low power MMIC LNA for Ka-band using InP HEMTs,” in Proc.IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 1999, pp. 149–152.
[13] R. Isobe, C. Wong, A. Potter, T. Long, M. Delaney, R. Rhodes, D. Jang, N. Loi, and Le Minh, “Q-band v-band MMIC chip set using 0.1 μm millimeter-wave low noise InPHEMTs,” in IEEE MTT-S Int. Microw. Symp. Dig., May 1995, vol. 3, pp. 1133–1136.
[14] S. Long, L. Escotte, J. Graffeuill, P. Fellon and D. Roques, “Ka-band coplanar low-noise amplifier design with power PHEMTs,” Eur. Microw. Conf., pp. 17–20, Oct. 2003.
[15] K. H. G. Duh, S. M. J. Liu, S. C. Wang, P. Ho, and P. C. Chao, “High performance Q-band 0.15 μm InGaAs HEMT MMIC LNA,” IEEE Microw. And Millimeter-Wave Monolithic Circuits Symp.Dig., Jun. 1993, pp. 99–102.
[16] P-H. Ho, C.-C. Chiong, and H. Wang, “An ultra-low-power Q-band LNA with 50% bandwidth in WIN GaAs 0.1-μm pHEMT process,” in Asia-Pacific Microw.Conf., Nov. 2013, pp. 713–715.
[17] R. Limacher, et al., “Broadband low-noise amplifiers for K-and Q-bands using 0.2 μm InP HEMT MMIC technology”, in Proc. IEEE CSIC Symp., pp.305-308, Oct. 2004.
[18] C.-H. Wu, and N.-Y. Wu, “Design of low power up-conversion self-oscillating mixer,” in Proc. China-Japan Joint Microw. Conference, (CJMW) pp. 1–4, Apr. 2011.
[19] C.-H. Wu, and G.-X. Jian, “Design of up conversion mixer with enhanced transconductance stage and low power consumption oscillator,” in Proc. International Conf. on Signals and Electronic Systems, pp. 229–232, Sept. 2010.
[20] K. W. Kobayashi, A. K. Oki, D. K. Umemoto, T. R. Block, and D. C. Streit, “A novel self-oscillating HEMT–HBT cascode VCO-mixer using an active tunable inductor,” IEEE J. Solid-State Circuits, vol. 33, no. 6, pp. 1231–1240, Jun. 1998.
[21] J.-Y. Kim; W.-Y. Choi, “30 GHz CMOS self-oscillating mixer for self-heterodyne receiver application,” IEEE Microw. Compon. Lett., vol. 20, no. 6, pp. 334–336, June. 2010.
[22] F. Starzer, P.-H. Forstner, L. Maurer, and A. Stelzer, “A 21-GHz self-oscillating down-converter mixer,” 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF systems (SiRF), Jan. 2012, pp. 93–96.
[23] T.-P. Wang, C.-C. Chang, R.-C. Liu, M.-D. Tsai, K.-J. Sun, Y.-T. Chang, L.-H. Lu, and H. Wang, “A low-power oscillator mixer in 0.18-/SPI mu/m CMOS technology”, IEEE Trans. Microw. Theory Techn., vol. 54, no. 1, Jan. 2006, pp. 88–95.
[24] Y. C. Hsiao, C. Meng, and Y. H. Peng, “Broadband CMOS Schottky-Diode Star Mixer Using Coupled-CPW Marchand Dual-Baluns”, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, vol. 27, no. 5, pp. 500-502, May, 2017.
[25] H.-K. Chiou and J.-Y. Lin, “Symmetric offset stack balun in standard 0.13 μm CMOS technology for three broadband and low-loss balanced passive mixer design”, IEEE Trans. Microw. Theory Techn., vol. 59, no. 6, Jun. 2011, pp. 1529–1538.
[26] H.-K. Chiou and T.-Y. Yang, “Low-loss and broadband asymmetric broadside-coupled balun for mixer design in 0.18 μm CMOS technology,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 4, Apr. 2008, pp. 835–848.
[27] http://www.iue.tuwien.ac.at/phd/brech/ch_6_1.htm
[28] Y. H. Hasiao, Z. M. Tsai, H. C. Liao, J. C. Kao, and H. Wang, “Millimeter-Wave CMOS Power Amplifiers with High Output Power and Wideband Performances”, IEEE MTT, vol. 61, NO. 12, Dec. 2013, pp. 4520-4533.
[29] C. Y. Law and A.-V. Pham, “A high gain 60 GHz power amplifier with 20 dBm output power in 90 nm CMOS,” in Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2010, pp. 426–427.
[30] J.-W. Lai and A. Valdes-Garcia, “A 1 V 17.9 dBm 60 GHz power amplifier in standard 65 nm CMOS,” in Int. Solid-State Circuits Conf. Tech. Dig., pp. 424–425, Feb. 2010.
[31] Y. Zhao, J. R. Long, andM. Spirito, “A 60 GHz-band 20 dBm power amplifier with 20% peak PAE,” in IEEE RFIC Symp., pp. 1–4, Jun. 2011.
[32] M. Bohsali and A. M. Niknejad, “Current combining 60 GHz CMOS power amplifiers,” in RFIC Symp., May 2009, pp. 31–34.
[33] U. R. Pfeiffer and D. Goren, “A 23-dBm 60-GHz distributed active transformer in a silicon process technology,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 5, May 2007, pp. 857–865.
[34] Y.-N. Jen, J.-H. Tsai, T.-W. Huang, and H. Wang, “Design and analysis of a 55–71 GHz compact and broadband distributed active transformer power amplifier in 90-nm CMOS process,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, Jul. 2009, pp. 1637–1646.
[35] D. Sandstrom, B. Martineau,M. Varonen,M. Karkkainen, A. Cathelin, and K. A. I.Halonen, “94GHz power-combining power amplifier with 13 dBm saturated output power in 65 nm CMOS,” in IEEE RFIC Symp., pp. 1–4, Jun. 2011.
[36] H. Jia, B. Chi, L. Kuang, and Z. Wang, “A W-Band Power Amplifier Utilizing a Miniaturized Marchand Balun Combiner” IEEE Trans. Microw. Thoery Techn., Feb 2015, vol. 63, no. 2, pp. 719–625.
[37] N. Marchand, “Transmission-line conversion transformers,” Electronics, vol. 17, pp. 142–146, Dec. 1944.
[38] H. C. Yeh, C. C. Chiong, S. Aloui, and H. Wang, “Analysis and Design of Millimeter-Wave Low-Voltage CMOS Cascode LNA with Magnetic Coupled Technique”, in IEEE MTT vol. 60 no. 12, Dec. 2012, pp. 4066-4079.
[39] Razavi, RF Microelectronics, 2nd Ed.., Upper Saddle River, NJ, USA, Pearson, 2012.
[40] K. Kanaya, K. Kawakami, T. Hisaka, T. Ishikawa, and S. Sakamoto, “A 94 GHz High Performance Quardruple Subharmonic Mixer MMIC”, in IEEE MTTS Digest, 2002, pp. 1249-1252
[41] C. S. Lin, P. S. Wu, M. C. Yeh, J. S. Fu, H. Y. Chang, K. Y. Lin, H. Wang, “Analysis of Multiconductor for Miniature MMIC Design”, in IEEE MTT, 2007, vol. 55, pp. 1190-1199.
[42] J. C. Kao1, C. Meng, H. J. Wei1, and G. W. Huang, “60-GHz SiGe BiCMOS Dual-Conversion Down-Converter Schottky Diode RF Mixer and Analog Gilbert IF Mixer with Microwave Quadrature Generator”, in Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 4th April, 2016.
[43] TS1401001 WIN NP25-00 Technology Summary--28V Operation 0.25μm High Power GaN&SiC HEMT Technology(Rev.3)
[44] https://read01.com/0zGKm.html
[45] D. M. Pozar, Microwave Engineering, 3rd Ed.. New York, NY, USA, Wiley, 2005.
[46] Y.-J. E. Chen, L.-Y. Yan, and W.-C. Yeh, “An integrated wideband power amplifier for cognitive radio,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 10, Oct. 2007, pp. 2053–2058.
[47] J. J. Komiak, W. Kong, K. Nichols, “High Efficiency Wideband 6 to 18 GHz PHEMT Power Amplifier MMIC”, Microwave Symposium Digest, 2002 IEEE MTT-S International, June. 2002, pp. 905-907
[48] I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Distributed active transformer—A new power-combining and impedance-transformation technique,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, Jan. 2002, pp. 316–331.
[49] R. Quaglia, V. Camarchia, T. Jiang, M. Pirola, S. D. Guerrieri, and B. Loran, “K-Band GaAs MMIC Doherty Power Amplifier for Microwave Radio with Optimized Driver”, in IEEE MTT, vol. 62, NO. 11, Nov. 2014, pp. 2518-2525.
[50] Y. Yoshihara, R. Fujimoto, N. Ono, T. Mitomo, H. Hoshino, and M.Hamada, “A 60-GHz CMOS power amplifier with marchand balun-based parallel power combiner,” in IEEE Asian Solid-State Circuits Conf. Tech. Dig., Nov. 2008, pp. 121–124.
[51] M. Thian, M. Tiebout, N. B. Buchanan, V. F. Fusco, and F. Dielacher, “A 76–84 GHz SiGe power amplifier array employing low-loss four-way differential combining transformer,” IEEE Trans. Microw. Theory Techn. , Feb. 2013, vol. 61, no. 2, pp. 931–938.
[52] D. Sandstrom, B. Martineau,M. Varonen,M. Karkkainen, A. Cathelin, and K. A. I. Halonen, “94GHz power-combining power amplifier with 13 dBm saturated output power in 65 nm CMOS,” in IEEE RFIC Symp., pp. 1–4, Jun. 2011.
[53] W. Tai and D. S. Ricketts, “A W-band 21.1 dBm power amplifier with an 8-way zero-degree combiner in 45 nm SOI CMOS,” in Proc. IEEE Int. Microw. Symp., Tampa, FL, USA, pp. 1–3, Jun. 2014.
[54] C. E. Patterson, D. Dawn, and J. Papapolymerou, “A W-Band CMOS PA Encapsulated in an Organic Flip-Chip Package”, IEEE MTT-S International, 2012, pp 1-3.
[55] P. Huang, T. W. Huang, H. Wang, E. W. Lin, Y. Shu, G. S. Dow, R. Lai, M. Biedenbender, and J. H. Elliott, “A 94 GHz 0.35 W Power Amplifier Module,” IEEE Trans. Microwave Theory Tech, vol. 45, Dec. 1997, pp. 2418–2423.

指導教授

張鴻埜(Hong-Yeh Chang)

審核日期

2017-8-10

推文