使用主動式回授之可調式增益低雜訊生醫放大器

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陳俊仁(Jiun-Ren Chen) 查詢紙本館藏

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電機工程學系

論文名稱

使用主動式回授之可調式增益低雜訊生醫放大器
(A Programmable-Gain Low-Noise Amplifier with Active Feedback for Biomedical Signal Detection)

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摘要(中)

隨著穿戴式行動裝置的普及，越來越多的可攜帶生醫電子產品問世，除了可以針對老年及須長期照護的人口提供即時醫療監控以外，一般民眾在運動當下亦可透過裝置得知自身心跳、血壓與肌力等數據，並利用無線傳輸技術同步至行動裝置顯示並分析。由於自人體擷取出的生醫訊號一般都極其微小，如何在攜帶式裝置上不受雜訊影響下，將訊號完整的放大至可進行分析是生醫感測系統的主要訴求。因此，本電路設計即以低雜訊、低失真及低功耗為設計目標。
本論文實現一應用於生醫訊號感測之類比前端放大器，並分為低雜訊放大器(LNA)及可調式增益放大器(PGA)兩個部分，系統架構皆採用電容耦合式儀表(CCIA)架構以阻絕前端電極貼片所產生之直流偏移。在心電訊號(ECG)及腦波訊號(EEG)的應用中，需要對於1 Hz左右的訊號做擷取，若僅使用虛擬電阻作為回授來實現極低截止點將會造成低頻訊號的失真，故本設計採用積分器當作主動式回授電路來實現低頻截止點，以降低對於虛擬電阻阻值的需求，進而提高低頻訊號之線性度。積分器中的虛擬電阻則是使用壓控對稱式虛擬電阻(voltage-controlled symmetric pseudo-resistors)，以實現可調式頻寬之功能，其可調頻寬內可包含腦波訊號(EEG)、心電訊號(ECG)及眼電訊號(EOG)等生理訊號。
本電路採用台積電0.18 μm CMOS 1P6M製程，晶片面積約占0.834 mm2 (包含ESD PAD)，電源供應電壓為1.2 V，整體電路功耗為4.1 μW (包含偏壓電路) ，最大應用頻寬為4.8 kHz。透過可調式增益放大器後分別可得到54 dB、48 dB、42 dB之增益，低頻截止點為1 Hz，應用頻寬內輸入雜訊為2.28 μVrms，雜訊效率因素(NEF)為2.29。

摘要(英)

With the popularity of the mobile devices, more and more portable biomedical electronic products have been launched. In addition to providing immediately medical supervision for elders and people who need long-term care, these products can measure the heartbeat, blood pressure and muscle strength for people taking exercise. With the wireless transmission technology, these physiological signals detected by read-out circuit will be synchronized to mobile device for advanced analysis. Because the signals acquire from human body usually feature extreme low amplitude, the ability to completely amplify these signals in portable device without introducing noise or interference is main challenge faced by biomedical detection system. For this reason, this circuit is designed with the aim of low noise, low distortion and low power.
This thesis presents a design of analog front-end amplifier for bio-signal detection and is composed of low noise amplifier (LNA) and programmable gain amplifier (PGA). CCIA (capacitor-coupled instrumentation amplifier) architecture is applied to both parts for rejection DC offset of front-end electrode-tissue. Generally, bio-signal detection system for ECG and EEG require acquisition of low frequency signal at nearly 1 Hz. Although conventional CCIA architecture that uses pseudo-resistor as the feedback path can achieve such low cut-off pole, it will also introduce the distortion at low frequency. Instead, this thesis applies active integrator as feedback path to realize low cut-off pole. By doing so, we can reduce the demand for pseudo-resistor resistance, and then improve signal linearity at low frequency. The pseudo-resistor in the integrator applies voltage-controlled symmetric pseudo-resistor (VCSPR) to realize programmable bandwidth function. In programmable bandwidth range, this design can detect Electroencephalography (EEG), Electrocardiogram (ECG) and Electrooculography (EOG) signal.
This circuit is designed in TSMC 0.18 μm CMOS 1P6M process and the chip area is 0.834 mm2 (including ESD PAD). The power consumption is 4.1 μW for 1.2 V power supply voltage. The minimum low cut-off frequency is 1 Hz (programmable) and application bandwidth is 5 kHz. With PGA, the system gain can be 54 dB, 48 dB, 42 dB respectively. Finally, input-referred noise is 2.28μVrms and noise efficiency factor (NEF) is 2.29.

關鍵字(中)

★ 類比前端低雜訊放大器
★ 電流重複使用
★ 虛擬電阻

關鍵字(英)

論文目次

目錄
摘要 i
ABSTRACT ii
致謝 iv
目錄 v
圖目錄 vii
表目錄 vii
第一章緒論 1
1.1 研究背景 1
1.2 研究動機 1
1.3 論文架構 2
第二章生醫訊號考量與規格制定 4
2.1 生理訊號類別 4
2.2 非理想效應 5
2.2.1 熱雜訊 (Thermal noise) 5
2.2.2 閃爍雜訊 (Flicker noise) 6
2.2.3 直流偏移電壓 (DC offset) 7
2.3 低雜訊放大器設計技巧 8
2.3.1 弱反轉區特性 8
2.3.2 電流重複利用技術(Current Reuse) 10
2.4 類比前端放大器之電路系統規格與需求 12
第三章生醫放大器系統及虛擬電阻探討 13
3.1 生醫放大器系統 13
3.1.1 傳統儀表放大器 (Instrument amplifier，IA) 13
3.1.2 Capacitive Feedback Network (CFN) 15
3.1.3 T 型(T-network)電容放大器 17
3.1.4 Miller Integrator Feedback Network (MIFN) 19
3.2 虛擬電阻架構 20
第四章主動式回授之可調式增益低雜訊生醫放大器 23
4.1 電路系統架構 23
4.1.1 各級規格考量 23
4.1.2 LNA架構 26
4.1.3 PGA架構 28
4.2 壓控對稱式虛擬電阻(Voltage-Controlled Symmetric Pseudo-Resistors, VCSPR) 30
4.3 運算放大器 33
4.3.1 LNA運算放大器 33
4.3.2 PGA運算放大器 38
第五章佈局考量與模擬結果 41
5.1 佈局考量 41
5.2 模擬結果 42
5.2.1 小訊號分析 (AC Analysis) 42
5.2.1.1 差模頻率響應 (Differential Mode Frequency Response) 42
5.2.1.2 增益與頻寬之可調機制 43
5.2.1.3 共模拒斥比 (Common Mode Rejection Ratio, CMRR) 44
5.2.1.4 電源拒斥比 (Power Supply Rejection Ratio, PSRR) 49
5.2.1.5 雜訊響應 (Noise Response) 54
5.2.2 暫態響應 (Transient Response) 55
5.2.3 總諧波失真 (Total Harmonic Distortion) 58
5.3 文獻比較 61
第六章結論與未來展望 63
6.1 結論 63
6.2 未來展望 64
參考文獻 65

參考文獻

參考文獻

[1] Webster, J. G., Medical Instrumentation Application and Design, Canada: John Wiley & Sons, 1998.
[2] Sohmyung Ha, Chul Kim, Yu M. Chi, Abraham Akinin, Christoph Maier, Akinori Ueno, and Gert Cauwenberghs, “Integrated Circuits and Electrode Interfaces for Noninvasive Physiological Monitoring,” IEEE Transaction on Biomedical Engineering, p. 1522–1537, 30 Feb 2014.
[3] W. Wattanapanitch, M. Fee and R. Sarpeshkar, "An energy-efficient micro-power neural recording amplifier," IEEE Trans. On Biomed. Circuits and Syst. vol. 1, no. 2, pp. 136-147, June 2007.
[4] Harrison, R.R. Charles, C., "A Low-Power Low-Noise CMOS Amplifier for Neural Recording," IEEE J. Solid-State Circuits, pp. 38, 958–965, 2003.
[5] Qian, C. Parramon, J. Sanchez-Sinencio, E., "A Micropower Low-Noise Neural Recording," IEEE J. Solid-State Circuits, pp. 46, 1392–1405, 2011.
[6] Wattanapanitch, W. Fee, M. Sarpeshkar, R., "An Energy-Efficient Micropower Neural Recording," IEEE Trans. Biomed. Circuits Syst., pp. 1, 136–147, 2007.
[7] K. A. Ng, Yong Ping Xu, “A Compact, Low Input Capacitance Neural Recording Amplifier,” IEEE Transaction on Biomedical Circuits and Systems, vol. 7, no. 5, pp. 610-620, Oct. 2013.
[8] Franco, S., “Design With Operational Amplifiers and Analog Integrated Circuits, 2nd ed. New York, NY, USA: McGraw-Hil,” p. pp., 1997,.
[9] Gosselin, B. Sawan, M. Chapman, C.A., “A Low-Power Integrated Bioamplifier with Active,” IEEE Trans. Biomed. Circuits Syst., pp. 1, 184–192, 2007.
[10] X. D. Zou, X. Y. Xu, J. Tan, L. B. Yao, and Y. Lian, "A 1-V 1.1-uW Sensor Interface IC for Wearable Biomedical Devices," Proc. IEEE Int. Symp. Circuits and Systems, p. 2725–2728, 2008.
[11] E. C. M. Lim, X. D. Zou, Y. J Zheng, and J. Tan, "Design of low-power low-voltage biomedical amplifier for electrocardiogram signal recording," in Proc. IEEE Biomedical Circuits Syst. Conf., p. 191–194, 2007.
[12] Xiaodan Zou, Xiaoyuan Xu, Libin Yao, Yong Lian,, "A 1-V 450-nW Fully Integrated Programmable Biomedical Sensor Interface Chip," IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 44, NO. 4, APRIL 2009.
[13] M.-T. Shiue, K.-W Yao, Gong, and C.-S.A., "Tunable high resistance voltage-controlled pseudo-resistor with wide input voltage swing capability," Electron. Lett., vol. 47,no. 6, pp. 377-378, Mar 2011.
[14] H. R. e. al., “Analysis and Design of Tunable Amplifiers for Implantable Neural Recording Applications,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol.1,, p. 546–556, Dec 2011.
[15] T. C. Carusone, D. A. Johns, K. W. Martin, Analog Integrated Circuit Design, United States of America: John Wiley & Sons, 2012.
[16] Ho, C. Wu and C., “An 8-channel chopper-stabilized analog front-end,” in Proc. 2015 IEEE Asian Solid-State Circuits Conf, p. 1–4, 2015.
[17] Razavi, Behzad, Design of Analog CMOS Integrated Circuits, Singapore: McGraw-Hill, 2001.
[18] M. Shoaran, M. Hosseini Kamal, “Compact Low-Power Cortical Recording Architecture for Compressive Multichannel Data Acquisition,” IEEE Trans. Biomed. Circuits Syst., 2014.
[19] Zhang, Fan; Holleman, Jeremy; Otis, Brian P., "Design of Ultra-Low Power Biopotential Amplifiers for Biosignal Acquisition Applications," IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 6, NO. 4,, AUGUST 2012.
[20] K. Abdelhalim, H. Jafari, L. Kokarovtseva, J. Velazquez, "64-channel UWB wireless neural vector analyzer SOC with a closed-loop phase synchrony-triggered neurostimulator," IEEE J. Solid-State Circuits, vol. 48, no. 10, p. 2494–2510, Oct 2013.
[21] Rezaee Dehsorkh, Hamidreza, “Analysis and Design of Tunable Ampli?ers for Implantable Neural Recording Applications,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 1, no. 4, p. 546–556, Dec 2011.
[22] X. D. Zou, X. Y. Xu, J. Tan, L. B. Yao, and Y. Lian, in Proc. IEEE Int. Symp. Circuits and Systems, p. 2725–2728, 2008.

指導教授

薛木添(Muh-Tian Shiue)

審核日期

2018-8-15

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