寬頻放大器暨V頻段射頻接收機前端電路之研製

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姓名

王姵媖(Pei-Ying Wang) 查詢紙本館藏

畢業系所

電機工程學系在職專班

論文名稱

寬頻放大器暨V頻段射頻接收機前端電路之研製
(Implementation of Broadband Amplifier and V-Band RF Receiver Front-End Circuits)

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摘要(中)

本論文主要研究內容為寬頻放大器及V頻帶接收機之前端電路研究，設計的晶片皆利用WIN 0.15 um pHEMT與TSMC 0.18 um CMOS製程研製。論文電路包含3-55 GHz分佈式寬頻放大器、15-50 GHz分佈式寬頻放大器、35-65 GHz串接式寬頻放大器、V頻帶三級串接式低雜訊放大器、27.1 GHz變壓器回授型壓控振盪器、V頻帶次諧波二極體混頻器以及V頻帶次諧波電阻性混頻器。
寬頻放大器設計包含三個電路，其中3-55 GHz分佈式寬頻放大器利用疊接式放大器及電容分容的技巧來設計，量測頻寬為1-53 GHz，功率增益為9.43 dB且增益平坦度為正負2 dB，輸入輸出返回損耗皆大於2 dB；15-50 GHz分佈式寬頻放大器利用有限接地共平面波導的優點及二級串接分佈式架構來設計，量測頻寬為13-54 GHz，功率增益為10.45 dB且增益平坦度為正負1.2 dB，輸入輸出返回損耗皆大於5 dB；35-65 GHz串接式寬頻放大器利用四級串接放大器及自给偏壓的方式來設計，量測頻寬為28-59 GHz，功率增益介於13至26 dB，輸入輸出返回損耗皆大於3.9 dB。
V頻帶接收機前端電路包含四個電路，其中V頻帶三級串接式低雜訊放大器利用源極電感退化技巧來達到輸入及雜訊匹配的最佳化，頻率在60 GHz，功率增益為24.35 dB，輸入輸出返回損耗皆大於2.58 dB，雜訊指數為3.2 dB；27.1 GHz變壓器回授型壓控振盪器利用變壓器來獲得較低的相位雜訊，在1 MHz的相位雜訊為-94 dBc/Hz，輸出功率為-15 dBm，可調頻率範圍為847 MHz；V頻帶次諧波二極體混頻器，在射頻訊號60 GHz時有最小轉換損耗12.075 dB，輸入功率1-dB壓縮點為 4 dBm，輸入三階截斷點為15 dBm；V頻帶次諧波電阻性混頻器，在射頻訊號60 GHz時有最小轉換損耗10.593 dB，輸入功率1-dB壓縮點為9 dBm，輸入三階截斷點為13 dBm。

摘要(英)

The work in this thesis focuses on broadband amplifiers and V-band RF receiver front-end circuits. The designed circuits include three broadband amplifiers with different topologies and bandwidths, a V-band low noise amplifier, a 27.1 GHz transformer feedback voltage control oscillator, a V-band subharmonic diode mixer and a V-band subharmonic resistive mixer. Those designs were fabricated in WIN 0.15 um pHEMT technology and TSMC 0.18 um CMOS process.
The thesis first addresses the performance and design of three different broadband amplifiers. The 3-55 GHz distributed amplifier made use of a pHEMT cascode gain cell capacitively coupled to the gate line. The circuit has been experimentally verified for its functionality. This circuit achieved a gain of 9.43±2 dB from 1 to 53 GHz, and the input/output return losses of more than 2 dB. The 15-50 GHz distributed amplifier was implemented with two-cascaded three-stage topology and the finite-ground coplanar waveguide for the transmission line design. The measured result showed this circuit had a gain of 10.5±1.2 dB from 13 to 54 GHz, and the input/output return losses of more than 6 dB. The 35-65 GHz broadband amplifier was designed with the four-cascaded single-stage scheme to achieve the high gain in the high frequency. The self-bias architecture was also used for the single positive supply operation. The cascade amplifier exhibited a gain of 13-26 dB in the bandwidth from 28 to 59 GHz, and the input/output return losses of more than 3.92 dB.
The thesis further addresses V-band RF receiver front-end circuits. The V-band three-stage-cascaded LNA architecture was a derivative of the inductive source degenerated topology. The LNA achieved a gain of 24.35 dB at 60 GHz, a noise figure of 3.2 dB, and the input/output return losses of more than 2.58 dB. The 27.1 GHz transformer feedback voltage controlled oscillator utilized the transformer to lower the phase noise. This voltage controlled oscillator obtained a tuning range of 847 MHz, an output power of -15 dBm, and the phase noise of -94 dBc/Hz at 1 MHz offset. The V-band subharmonic diode mixer was based on an antiparallel Schottky diode pair. The design exhibited a 12.075 dB conversion loss at the RF frequency of 60 GHz, the LO frequency of 27.1 GHz, and the IF frequency of 5.8 GHz. The measured input power at the 1-dB gain compression point was 4 dBm, and the input third order inter-modulation intercept point was 15 dBm. The V-band subharmonic resistive mixer achieved a 10.593 dB conversion loss at the RF frequency of 60 GHz, the LO frequency of 27.1 GHz, and the IF frequency of 5.8 GHz. The measured input power at the 1-dB gain compression point was 9 dBm, and the input third order inter-modulation intercept point was 13 dBm.

關鍵字(中)

★ 次諧波混頻器
★ 振盪器
★ 低雜訊放大器
★ V頻帶
★ 分佈式放大器
★ 寬頻放大器

關鍵字(英)

★ Subharmonic Mixer
★ VCO
★ Oscillator
★ LNA
★ Low Noise Amplifier
★ V Band
★ Distributed Amplifier
★ Broadband Amplifier

論文目次

摘要i
誌謝iv
目錄vi
圖目錄ix
表目錄xiv
第一章緒論1
1-1 研究動機1
1-2 研究成果2
1-3 章節簡述3
第二章分佈式寬頻放大器4
2-1 分佈式寬頻放大器簡介4
2-1.1分佈式寬頻放大器原理4
2-1.2閘極汲極傳輸線的衰減5
2-1.3傳統式分佈式放大器7
2-1.4串接式分佈式放大器8
2-2 3-55 GHz分佈式寬頻放大器9
2-2.1電路設計重點9
2-2.2電路主要架構10
2-2.3電路模擬與量測結果11
2-2.4結果討論18
2-3 15-50 GHz分佈式寬頻放大器( Two-Cascaded Three-Stage DA )19
2-3.1電路設計重點19
2-3.2電路主要架構20
2-3.3電路模擬與量測結果21
2-3.4結果討論27
2-4 30-65 GHz串接式寬頻放大器(Four-Cascaded Single-Stage DA)28
2-4.1電路設計重點28
2-4.2電路主要架構29
2-4.3電路模擬與量測結果30
2-4.4結果討論36
第三章 V頻帶低雜訊放大器37
3-1 低雜訊放大器簡介37
3-1.1雜訊來源37
3-1.2雜訊指數介紹38
3-1.3低雜訊放大器的重要參數介紹40
3-2 V頻帶低雜訊放大器41
3-2.1電路設計重點41
3-2.2電路主要架構及設計流程41
3-2.3電路的模擬與量測結果43
3-2.4結果討論48
第四章 27.1 GHz壓控振盪器49
4-1 壓控振盪器簡介49
4-1.1振盪器原理及重要規格參數49
4-1.2振盪器重要規格參數50
4-2 27.1 GHz 變壓器回授型壓控振盪器52
4-2.1電路設計重點52
4-2.2電路主要架構及設計流程53
4-2.3電路的模擬與量測結果54
4-2.4結果討論58
第五章V頻帶次諧波混頻器59
5-1 混頻器簡介與原理59
5-1.1混頻器重要參數60
5-2 V頻帶次諧波二極體混頻器62
5-2.1電路設計重點62
5-2.2電路主要架構及設計流程63
5-2.3電路模擬與量測結果65
5-2.4結果討論70
5-3 V頻帶次諧波電阻性混頻器71
5-3.1電路設計重點71
5-3.2電路主要架構及設計流程71
5-3.3電路模擬與量測結果74
5-3.4結果討論79
第六章結論80
6-1 結論80
6-2 未來期許與研究方向82
參考文獻83

參考文獻

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指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2009-7-23

推文